Semiconductor Device with Buried Electrode

• US 20130049203A1
• Filed: 08/29/2011
• Published: 02/28/2013
• Est. Priority Date: 08/29/2011
• Status: Active Grant

• Current Assignee: Infineon Technologies Austria Ag (Infineon Technologies AG)
• Original Assignee: Infineon Technologies Austria Ag (Infineon Technologies AG)
• Inventors: Ahrens, Carsten, Rodriguez, Francisco Javier Santos, Schulze, Hans-Joachim, Baumgartl, Johannes
• Granted Patent: US 8,816,503 B2
• Time in Patent Office: Days
• US Class Current: 257/770
• CPC Class Codes: H01L 21/28 Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268 etching for patterning the electrodes H01L21/311, H01L21/3213; multistep manufacturing processes for data storage electrodes H01L29/4011
• CPC Class Codes: H01L 21/743 Making of internal connections, substrate contacts
• CPC Class Codes: H01L 23/535 including internal interconnections, e.g. cross-under constructions internal lead connections H01L23/481
• CPC Class Codes: H01L 29/41 characterised by their shape, relative sizes or dispositions
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A semiconductor device with a buried electrode is manufactured by forming a cavity within a semiconductor substrate, forming an active device region in an epitaxial layer disposed on the semiconductor substrate and forming the buried electrode below the active device region in the cavity. The buried electrode is formed from an electrically conductive material different than the material of the semiconductor substrate.

Claims

1. A semiconductor device, comprising:

an active device region formed in an epitaxial layer disposed on a semiconductor substrate; and

a buried electrode disposed below the active device region in a cavity formed within the semiconductor substrate, the buried electrode comprising an electrically conductive material different than the material of the semiconductor substrate.

2. The semiconductor device of claim 1, wherein the buried electrode comprises a metal material.

3. The semiconductor device of claim 2, wherein the buried electrode comprises TiN or Tungsten.

4. The semiconductor device of claim 1, wherein the buried electrode comprises polysilicon.

5. The semiconductor device of claim 1, wherein the buried electrode comprises carbon.

6. The semiconductor device of claim 1, further comprising an electrically conductive contact which extends from the buried electrode to a surface of the semiconductor substrate.

7. The semiconductor device of claim 6, wherein the contact extends vertically from the buried electrode to the surface of the semiconductor substrate on which the epitaxial layer is disposed.

8. The semiconductor device of claim 6, wherein the contact extends vertically from the buried electrode to the opposite surface of the semiconductor substrate on which the epitaxial layer is disposed.

9. The semiconductor device of claim 6, wherein the contact extends laterally from the buried electrode to a side surface of the semiconductor substrate which is disposed between top and bottom surfaces of the semiconductor substrate.

10. The semiconductor device of claim 1, wherein the material of the semiconductor substrate is doped more heavily in a region adjacent the buried electrode than in a region of the semiconductor substrate between the active device region and the more heavily doped region of the semiconductor substrate material.

11. The semiconductor device of claim 1, wherein the electrically conductive material of the buried electrode is disposed along sidewalls of the cavity formed in the semiconductor substrate so that a cavity is disposed in an inner part of the buried electrode.

12. A method of manufacturing a semiconductor device, comprising:

forming a cavity within a semiconductor substrate;

forming an active device region in an epitaxial layer disposed on the semiconductor substrate; and

forming a buried electrode below the active device region in the cavity, the buried electrode comprising an electrically conductive material different than the material of the semiconductor substrate.

13. The method of claim 12, comprising filling the cavity at least partly with a metal material.

14. The method of claim 13, comprising filling the cavity at least partly with TiN or Tungsten.

15. The method of claim 12, comprising filling the cavity at least partly with polysilicon.

16. The method of claim 12, comprising filling the cavity at least partly with carbon.

17. The method of claim 12, further comprising forming a contact which extends from the buried electrode to a surface of the semiconductor substrate and which forms an interconnection with the buried electrode.

18. The method of claim 12, wherein the buried electrode is formed by a conformal chemical vapor deposition process, an atomic layer deposition process or a wetting process, and the contact is formed by a sputtering or plating process.

19. The method of claim 12, further comprising doping the material of the semiconductor substrate more heavily in a region adjacent the cavity than in a region of the semiconductor substrate between the active device region and the more heavily doped region of the semiconductor substrate material.

20. The method of claim 19, wherein the material of the semiconductor substrate adjacent the cavity is doped more heavily by introducing dopants in gaseous form into the cavity before the buried electrode is formed in the cavity, and performing a diffusion process to activate the dopants.

21. The method of claim 12, comprising disposing the electrically conductive material of the buried electrode along sidewalls of the cavity so that an inner part of the buried electrode has an unfilled cavity.

22. The method of claim 12, wherein the cavity is formed within the semiconductor substrate by forming a porous region in the semiconductor substrate and subsequently forming the epitaxial layer on the semiconductor substrate at a temperature high enough to form the cavity from the porous region.

23. The method of claim 12, wherein the cavity is formed within the semiconductor substrate by irradiating a region of the semiconductor substrate with protons and subsequently annealing the semiconductor substrate at a temperature high enough to form the cavity from the irradiated region.

24. The method of claim 12, wherein the cavity is formed within the semiconductor substrate by etching trenches into the semiconductor substrate and subsequently annealing the semiconductor substrate at an elevated temperature in a hydrogen atmosphere.

25. The method of claim 12, wherein the cavity is formed within the semiconductor substrate by forming a buried doped layer within the semiconductor substrate which has the opposite doping type as the surrounding material of the semiconductor substrate and subsequently performing an etching process which stops at a junction formed between the buried doped layer and the surrounding material of the semiconductor substrate.