OXIDE SEMICONDUCTOR LAYER AND SEMICONDUCTOR DEVICE

• US 20130062601A1
• Filed: 10/25/2012
• Published: 03/14/2013
• Est. Priority Date: 10/08/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: YAMAZAKI, Shunpei, SAKAKURA, Masayuki, MIYANAGA, Akiharu, TAKAHASHI, Masahiro, HIROHASHI, Takuya, SHIMAZU, Takashi
• Granted Patent: US 9,306,072 B2
• Time in Patent Office: Days
• US Class Current: 257/43
• CPC Class Codes: H01L 29/78606 with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device H01L29/78642, H01L29/78645 take precedence
• CPC Class Codes: H01L 29/78618 characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure silicide contacts, electrodes in general H01L29/458
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78693 the semiconducting oxide being amorphous
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

An object is to provide an oxide semiconductor layer having a novel structure which is preferably used for a semiconductor device. Alternatively, another object is to provide a semiconductor device using an oxide semiconductor layer having the novel structure. An oxide semiconductor layer includes an amorphous region which is mainly amorphous and a crystal region containing crystal grains of In₂Ga₂ZnO₇ in a vicinity of a surface, in which the crystal grains are oriented so that the c-axis is almost vertical with respect to the surface. Alternatively, a semiconductor device uses such an oxide semiconductor layer.

Claims

1. A semiconductor device comprising:

a substrate;

a gate electrode layer over the substrate;

a gate insulating layer over the gate electrode layer;

a first oxide semiconductor layer over the gate insulating layer;

a second oxide semiconductor layer over the first oxide semiconductor layer; and

a source electrode layer and a drain electrode layer electrically connected to the second oxide semiconductor layer,

wherein each of the first oxide semiconductor layer and the second oxide semiconductor layer comprises an oxide semiconductor containing In, Ga and Zn,

wherein the second oxide semiconductor layer includes crystal grains, and

wherein the crystal grains are oriented so that c-axes of the crystal grains are almost vertical with respect to a surface of the second oxide semiconductor layer.

2. The semiconductor device according to claim 1, wherein the crystal grains include a crystal structure of In₂Ga₂ZnO₇.

3. The semiconductor device according to claim 1, wherein the crystal grains include a crystal structure of InGaZnO₄.

4. The semiconductor device according to claim 1, wherein the crystal grains include a mix of crystal structures of In₂Ga₂ZnO₇ and InGaZnO₄.

5. The semiconductor device according to claim 1, wherein the first oxide semiconductor layer includes an amorphous region.

6. The semiconductor device according to claim 5, wherein a Zn content is less than an In content or a Ga content in the amorphous region.

7. The semiconductor device according to claim 1, further comprising an insulating layer covering the second oxide semiconductor layer.

8. The semiconductor device according to claim 1, wherein a thickness of the second oxide semiconductor layer is 20 nm or less.

9. A semiconductor device comprising:

a substrate;

a first oxide semiconductor layer over the substrate;

a second oxide semiconductor layer over the first oxide semiconductor layer;

a source electrode layer and a drain electrode layer electrically connected to the second oxide semiconductor layer;

a gate insulating layer over the second oxide semiconductor layer, the source electrode layer and the drain electrode layer; and

a gate electrode layer over the gate insulating layer,

wherein each of the first oxide semiconductor layer and the second oxide semiconductor layer comprises an oxide semiconductor containing In, Ga and Zn,

wherein the second oxide semiconductor layer includes crystal grains, and

wherein the crystal grains are oriented so that c-axes of the crystal grains are almost vertical with respect to a surface of the second oxide semiconductor layer.

10. The semiconductor device according to claim 9, wherein the crystal grains include a crystal structure of In₂Ga₂ZnO₇.

11. The semiconductor device according to claim 9, wherein the crystal grains include a crystal structure of InGaZnO₄.

12. The semiconductor device according to claim 9, wherein the crystal grains include a mix of crystal structures of In₂Ga₂ZnO₇ and InGaZnO₄.

13. The semiconductor device according to claim 9, wherein the first oxide semiconductor layer includes an amorphous region.

14. The semiconductor device according to claim 13, wherein a Zn content is less than an In content or a Ga content in the amorphous region.

15. The semiconductor device according to claim 9, wherein a thickness of the second oxide semiconductor layer is 20 nm or less.