BUFFER MANAGER AND METHODS FOR MANAGING MEMORY

• US 20130088965A1
• Filed: 12/03/2012
• Published: 04/11/2013
• Est. Priority Date: 03/18/2010
• Status: Active Grant

• Current Assignee: Marvell Asia Pte Limited (Marvell Technology Group Limited)
• Original Assignee: Marvell World Trade Limited (Marvell Technology Group Limited)
• Inventors: Bishara, Nafea, Pais, Alon
• Granted Patent: US 9,769,081 B2
• Time in Patent Office: Days
• US Class Current: 370/235
• CPC Class Codes: G06F 2205/106 Details of pointers, i.e. structure of the address generators
• CPC Class Codes: G06F 5/12 Means for monitoring the fill level; Means for resolving contention, i.e. conflicts between simultaneous enqueue and dequeue operations
• CPC Class Codes: H04L 47/621 Individual queue per connection or flow, e.g. per VC

Abstract

Some of the embodiments of the present disclosure provide a method comprising managing a plurality of buffer addresses in a system-on-chip (SOC); and if a number of available buffer addresses in the SOC falls below a low threshold value, obtaining one or more buffer addresses from a memory, which is external to the SOC, to the SOC. Other embodiments are also described and claimed.

Claims

1. A system comprising:

a buffer memory including a plurality of buffer locations, ones of the plurality of buffer locations being identified by a respective physical address, ones of the plurality of buffer locations being configured to store (i) a respective buffered data and (ii) a respective virtual address that is associated with the buffer location;

a processor unit configured to access buffered data stored in a respective buffer location using the respective virtual address associated with the buffer location; and

one or more client components configured to access the buffered data stored in the respective buffer location using the respective physical address associated with the buffer location.

2. The system claim 1, wherein the one or more client components are further configured to:

access a virtual address of a buffer location by (i) accessing the buffered data stored in the buffer location using the physical address associated with the buffer location and (ii) identifying the virtual address of the buffer location from the accessed buffered data.

3. The system of claim 1, further comprising:

a buffer management unit configured to manage allocations of the buffer locations using the physical addresses of the buffer locations.

4. The system of claim 1, further comprising a buffer management unit comprising:

an internal buffer pointer pool; and

a controller configured to;

monitor a number of unassigned buffer pointers in the internal buffer pointer pool, and

in response to the number of unassigned buffer pointers in the internal buffer pointer pool falling below a low threshold value, allocate a first one or more buffer pointers from an external buffer pointer pool to the internal buffer pointer pool, ones of the first one or more buffer pointers pointing to a corresponding buffer location of the plurality of buffer locations.

5. The system of claim 4, wherein the controller is further configured to:

in response to the number of unassigned buffer pointers in the internal buffer pointer pool exceeding a high threshold value, allocate a second one or more buffer pointers from the internal buffer pointer pool to the external buffer pointer pool.

6. The system of claim 5, wherein the internal buffer pointer pool is a first internal buffer pointer pool and the external buffer pointer pool is a first external buffer pointer pool, wherein the buffer management unit further comprises:

a second internal buffer pointer pool,

wherein the controller is further configured to;

monitor a number of unassigned buffer pointers in the second internal buffer pointer pool, and

in response to the number of unassigned buffer pointers in the second internal buffer pointer pool falling below another low threshold value, allocate a third one or more buffer pointers from a second external buffer pointer pool to the second internal buffer pointer pool, ones of the third one or more buffer pointers pointing to a corresponding buffer location of the plurality of buffer locations.

7. The system of claim 6, wherein the controller is further configured to:

in response to the number of unassigned buffer pointers in the second internal buffer pointer pool exceeding another high threshold value, allocate a fourth one or more buffer pointers from the second internal buffer pointer pool to the second external buffer pointer pool.

8. The system of claim 7, wherein:

the one or more client components comprises at least two client components; and

the first internal buffer pointer pool is associated with a first traffic flow originating from a first client component of the at least two client components, such that available buffer pointers from the first internal buffer pointer pool are assigned to data packets of the first traffic flow; and

the second internal buffer pointer pool is associated with a second traffic flow originating from a second client component of the at least two client components, such that available buffer pointers from the second internal buffer pointer pool are assigned to data packets of the second traffic flow.

9. The system of claim 1, wherein:

the processor unit and the one or more client components are disposed on an integrated circuit substrate and configured as a system on a chip; and

the buffer memory is external to the system on a chip.

10. The system of claim 1, wherein:

the processor unit, the buffer memory and the one or more client components are disposed on an integrated circuit substrate and configured as a system on a chip.

11. The system of claim 1, wherein one of the one or more client components comprises a network interface.

12. A method comprising:

storing, in ones of a plurality of buffer locations, a respective buffered data and a respective virtual address that is associated with the buffer location;

identifying ones of the plurality of buffer locations using a respective physical address associated with the buffer location;

accessing, by a processor unit, buffered data stored in a respective buffer location using the respective virtual address associated with the buffer location; and

accessing, by a client component, buffered data stored in the respective buffer location using the respective physical address associated with the buffer location.

13. The system claim 12, further comprising:

accessing, by the client component, a virtual address of a buffer location by (i) accessing the buffered data stored in the buffer location using the physical address associated with the buffer location and (ii) identifying the virtual address of the buffer location from the accessed buffered data.

14. The method of claim 12, further comprising:

managing allocations of the buffer locations using the physical addresses of the buffer locations.

15. The method of claim 12, further comprising managing an internal buffer pointer pool, wherein managing the internal buffer pointer pool further comprises:

monitoring a number of unassigned buffer pointers in the internal buffer pointer pool; and

in response to the number of unassigned buffer pointers in the internal buffer pointer pool falling below a low threshold value, allocating a first one or more buffer pointers from an external buffer pointer pool to the internal buffer pointer pool, ones of the first one or more buffer pointers pointing to a corresponding buffer location of the plurality of buffer locations.

16. The method of claim 15, wherein managing the internal buffer pointer pool further comprises:

in response to the number of unassigned buffer pointers in the internal buffer pointer pool exceeding a high threshold value, allocating a second one or more buffer pointers from the internal buffer pointer pool to the external buffer pointer pool.

17. The method of claim 16, wherein the internal buffer pointer pool is a first internal buffer pointer pool and the external buffer pointer pool is a first external buffer pointer pool, wherein the method further comprises managing a second internal buffer pointer pool, wherein managing the second internal buffer pointer pool further comprises:

monitoring a number of unassigned buffer pointers in the second internal buffer pointer pool; and

in response to the number of unassigned buffer pointers in the second internal buffer pointer pool falling below another low threshold value, allocating a third one or more buffer pointers from a second external buffer pointer pool to the second internal buffer pointer pool, ones of the third one or more buffer pointers pointing to a corresponding buffer location of the plurality of buffer locations.

18. The method of claim 17, wherein managing the second internal buffer pointer pool further comprises:

in response to the number of unassigned buffer pointers in the second internal buffer pointer pool exceeding another high threshold value, allocating a fourth one or more buffer pointers from the second internal buffer pointer pool to the second external buffer pointer pool.

19. The system of claim 18, wherein client component is a first client component, the method further comprising:

associating the first internal buffer pointer pool with a first traffic flow originating from the first client component, such that available buffer pointers from the first internal buffer pointer pool are assigned to data packets of the first traffic flow; and

associating the second internal buffer pointer pool with a second traffic flow originating from a second client component, such that available buffer pointers from the second internal buffer pointer pool are assigned to data packets of the second traffic flow.