3D Capacitor and Method of Manufacturing Same

• US 20130113072A1
• Filed: 11/04/2011
• Published: 05/09/2013
• Est. Priority Date: 11/04/2011
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Liu, Chi-Wen, Wang, Chao-Hsiung
• Granted Patent: US 9,893,163 B2
• Time in Patent Office: Days
• US Class Current: 257/532
• CPC Class Codes: H01L 28/92 made by patterning layers, e.g. by etching conductive layers
• CPC Class Codes: H01L 29/66181 Conductor-insulator-semiconductor capacitors, e.g. trench capacitors
• CPC Class Codes: H01L 29/94 Metal-insulator-semiconductors, e.g. MOS
• CPC Class Codes: H01L 29/945 Trench capacitors

Abstract

A 3D capacitor and method for fabricating a 3D capacitor is disclosed. An exemplary 3D capacitor includes a substrate including a fin structure, the fin structure including a plurality of fins. The 3D capacitor further includes an insulation material disposed on the substrate and between each of the plurality of fins. The 3D capacitor further includes a dielectric layer disposed on each of the plurality of fins. The 3D capacitor further includes a first electrode disposed on a first portion of the fin structure. The first electrode being in direct contact with a surface of the fin structure. The 3D capacitor further includes a second electrode disposed on a second portion of the fin structure. The second electrode being disposed directly on the dielectric layer and the first and second portions of the fin structure being different.

Claims

1. A three-dimensional (3D) capacitor comprising:

a substrate including a fin structure, the fin structure including a plurality of fins;

an insulation material disposed on the substrate and between each of the plurality of fins;

a dielectric layer disposed on each of the plurality of fins;

a first electrode disposed on a first portion of the fin structure, the first electrode being in direct contact with a surface of the fin structure; and

a second electrode disposed on a second portion of the fin structure, the second electrode being disposed directly on the dielectric layer,

wherein the first and second portions of the fin structure are different.

2. The 3D capacitor of claim 1 wherein the dielectric layer is disposed on the insulation material between each of the plurality of fins.

3. The 3D capacitor of claim 1 wherein the first portion includes a first fin of the plurality of fins,

wherein the second portion includes a second fin of the plurality of fins, and

wherein the first and second fins are each different fins.

4. The 3D capacitor of claim 3 wherein the first electrode is disposed in a central region of the first fin of the plurality of fins, and

wherein the second electrode is disposed along the length of the second fin of the plurality of fins.

5. The 3D capacitor of claim 3 wherein the first electrode is on a different fin than the second electrode.

6. The 3D capacitor of claim 1 wherein the first portion includes only one fin of the plurality of fins,

wherein the second portion includes more than one fin of the plurality of fins, and

wherein the first and second portions do not have any fins of the plurality of fins in common.

7. The 3D capacitor of claim 1 wherein the first and second electrodes include a material selected from the group consisting of Al, Cu, and W.

8. A three-dimensional (3D) capacitor comprising:

a semiconductor substrate;

a fin structure including one or more fins formed on the semiconductor substrate;

an insulator material formed between each of the one or more fins;

a dielectric layer formed on a first portion of the fin structure;

a first electrode formed on the dielectric layer;

spacers formed on sidewalls of the first electrode; and

a second electrode formed on a second portion of the fin structure,

wherein the first and second portions are different, and

wherein the second electrode includes a surface that is in direct contact with a surface of the spacers.

9. The 3D capacitor of claim 8 wherein the semiconductor substrate is a bulk silicon substrate.

10. The 3D capacitor of claim 8 wherein the second electrode is formed directly on the fin structure and directly on the insulating material.

11. The 3D capacitor of claim 8 wherein the first electrode traverses each of the one or more fins, and

wherein the second electrode traverses each of the one or more fins.

12. The 3D capacitor of claim 8 wherein the semiconductor substrate and the fin structure include silicon.

13. A method of manufacturing a three-dimensional (3D) capacitor, comprising:

providing a substrate;

forming a fin structure including one or more fins on the substrate;

depositing an insulation material on the substrate and on the fin structure, the insulation material substantially filling a region between each of the one or more fins;

removing a portion of the insulation material from the region between each of the one or more fins such that a portion of each of the one or more fins is exposed;

forming a dielectric layer over each of the one or more fins;

forming a first electrode on a first portion of the fin structure; and

forming a second electrode on a second portion of the fin structure,

wherein the first and second portions are different, and

wherein the first and second electrodes are isolated one from the other.

14. The method of claim 13 further comprising:

after forming the fin structure and before depositing the insulation material, implanting the fin structure such that the fin structure has a low-resistance surface,

wherein forming the first electrode includes forming the first electrode such that the first electrode has direct contact with the low-resistance surface of the fin structure,

wherein forming the second electrode includes forming the second electrode on the dielectric layer such that the second electrode does not have direct contact with the low-resistance surface of the fin structure, and

wherein the first and second electrodes do not share a common fin.

15. The method of claim 13 further comprising:

after forming the fin structure and before depositing the insulation material, implanting the fin structure such that the fin structure has a low-resistance surface,

wherein the first portion includes a first fin of the one or more fins of the fin structure,

wherein the second portion includes a second fin of the one or more fins of the fin structure, and

wherein the first and second fins are each different fins.

16. The method of claim 13 further comprising:

after removing a portion of the insulation material from the region between each of the one or more fins, implanting the fin structure such that the fin structure has a low-resistance surface,

wherein forming the first electrode includes forming the first electrode such that the first electrode has direct contact with the low-resistance surface of the fin structure,

wherein forming the second electrode includes forming the second electrode on the dielectric layer such that the second electrode does not have direct contact with the low-resistance surface of the fin structure, and

wherein the first and second electrodes do not share a common fin.

17. The method of claim 13 further comprising:

after removing a portion of the insulation material from the region between each of the one or more fins, implanting the fin structure such that the fin structure has a low-resistance surface; and

forming spacers on sidewalls of the first electrode,

wherein the second electrode includes a surface that is in direct contact with a surface of the spacers.

18. The method of claim 17 wherein forming the first electrode includes forming the first electrode such that each of the one or more fins are traversed, and

wherein forming the second electrode includes forming the second electrode such that each of the one or more fins are traversed.

19. The method of claim 18 wherein forming the first electrode includes forming the first electrode directly on the dielectric layer and in the region between each of the one or more fins, and

wherein forming the second electrode includes forming the second electrode directly on the low-resistance surface of the fin structure and in the region between each of the one or more fins.

20. The method of claim 19 wherein forming the second electrode includes forming the second electrode directly on the insulation material in the region between each of the one or more fins.