SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

• US 20130126863A1
• Filed: 01/17/2013
• Published: 05/23/2013
• Est. Priority Date: 04/16/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: YAMAZAKI, Shunpei, GODO, Hiromichi, KISHIDA, Hideyuki
• Granted Patent: US 8,853,690 B2
• Time in Patent Office: Days
• US Class Current: 257/43
• CPC Class Codes: H01L 21/02554 Oxides
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 27/12 the substrate being other than a semiconductor body, e.g. an insulating body
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78609 for preventing leakage current H01L29/78618 takes precedence
• CPC Class Codes: H01L 29/78618 characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure silicide contacts, electrodes in general H01L29/458
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

An object is to provide a transistor including an oxide layer which includes Zn and does not include a rare metal such as In or Ga. Another object is to reduce an off current and stabilize electric characteristics in the transistor including an oxide layer which includes Zn. A transistor including an oxide layer including Zn is formed by stacking an oxide semiconductor layer including insulating oxide over an oxide layer so that the oxide layer is in contact with a source electrode layer or a drain electrode layer with the oxide semiconductor layer including insulating oxide interposed therebetween, whereby variation in the threshold voltage of the transistor can be reduced and electric characteristics can be stabilized.

Claims

1. A semiconductor device comprising:

a gate electrode layer;

a gate insulating layer over the gate electrode layer;

a first oxide semiconductor layer over the gate insulating layer;

a source electrode layer and a drain electrode layer over the first oxide semiconductor layer; and

a second oxide semiconductor layer over the source electrode layer, the drain electrode layer and the first oxide semiconductor layer,

wherein the first oxide semiconductor layer and the second oxide semiconductor layer comprise insulating oxide comprising Zn, and

wherein the second oxide semiconductor layer is in contact with the first oxide semiconductor layer at a portion between the source electrode layer and the drain electrode layer.

2. The semiconductor device according to claim 1,

wherein the first oxide semiconductor layer includes a region which is provided between the source electrode layer and the drain electrode layer and whose thickness is smaller than that of a region overlapping with the source electrode layer or the drain electrode layer.

3. The semiconductor device according to claim 1,

wherein the gate electrode layer has a width in a channel direction which is larger than that of the second oxide semiconductor layer comprising insulating oxide and that of the first oxide semiconductor layer.

4. The semiconductor device according to claim 1,

wherein the first oxide semiconductor layer and the second oxide semiconductor layer comprising insulating oxide do not comprise a rare metal.

5. A semiconductor device comprising:

a gate electrode layer;

a gate insulating layer over the gate electrode layer;

a first oxide semiconductor layer over the gate insulating layer;

a source electrode layer and a drain electrode layer over the first oxide semiconductor layer;

a second oxide semiconductor layer over the source electrode layer, the drain electrode layer and the first oxide semiconductor layer;

a pixel electrode in electrical contact with one of the source electrode layer and the drain electrode layer; and

a light emitting layer over the pixel electrode,

wherein the first oxide semiconductor layer and the second oxide semiconductor layer comprise insulating oxide comprising Zn, and

wherein the second oxide semiconductor layer is in contact with the first oxide semiconductor layer at a portion between the source electrode layer and the drain electrode layer.

6. The semiconductor device according to claim 5,

wherein the first oxide semiconductor layer includes a region which is provided between the source electrode layer and the drain electrode layer and whose thickness is smaller than that of a region overlapping with the source electrode layer or the drain electrode layer.

7. The semiconductor device according to claim 5,

wherein the gate electrode layer has a width in a channel direction which is larger than that of the second oxide semiconductor layer comprising insulating oxide and that of the first oxide semiconductor layer.

8. The semiconductor device according to claim 5,

wherein the first oxide semiconductor layer and the second oxide semiconductor layer comprising insulating oxide do not comprise a rare metal.

9. A semiconductor device comprising:

a gate electrode layer;

a gate insulating layer over the gate electrode layer;

a first oxide semiconductor layer over the gate insulating layer;

a first n-type buffer layer and a second n-type buffer layer over the first oxide semiconductor layer;

a source electrode layer over the first n-type buffer layer, and a drain electrode layer over the second n-type buffer layer; and

a second oxide semiconductor layer over the source electrode layer, the drain electrode layer and the first oxide semiconductor layer,

wherein the first oxide semiconductor layer and the second oxide semiconductor layer comprise insulating oxide comprising Zn, and

wherein the second oxide semiconductor layer is in contact with the first oxide semiconductor layer at a portion between the source electrode layer and the drain electrode layer.

10. The semiconductor device according to claim 9,

wherein the first oxide semiconductor layer and the second oxide semiconductor layer comprise an oxide semiconductor comprising Zn.

11. The semiconductor device according to claim 9,

wherein the first oxide semiconductor layer includes a region which is provided between the source electrode layer and the drain electrode layer and whose thickness is smaller than that of a region overlapping with the source electrode layer or the drain electrode layer.

12. The semiconductor device according to claim 9,

wherein the gate electrode layer has a width in a channel direction which is larger than that of the second oxide semiconductor layer comprising insulating oxide and that of the first oxide semiconductor layer.

13. The semiconductor device according to claim 9,

wherein the first oxide semiconductor layer and the second oxide semiconductor layer comprising insulating oxide do not comprise a rare metal.

14. A semiconductor device comprising:

a gate electrode layer;

a gate insulating layer over the gate electrode layer;

a first oxide semiconductor layer over the gate insulating layer;

a first n-type buffer layer and a second n-type buffer layer over the first oxide semiconductor layer;

a source electrode layer over the first n-type buffer layer, and a drain electrode layer over the second n-type buffer layer;

a second oxide semiconductor layer over the source electrode layer, the drain electrode layer and the first oxide semiconductor layer;

a pixel electrode in electrical contact with one of the source electrode layer and the drain electrode layer; and

a light emitting layer over the pixel electrode,

wherein the first oxide semiconductor layer and the second oxide semiconductor layer comprise insulating oxide comprising Zn, and

wherein the second oxide semiconductor layer is in contact with the first oxide semiconductor layer at a portion between the source electrode layer and the drain electrode layer.

15. The semiconductor device according to claim 14,

wherein the first oxide semiconductor layer and the second oxide semiconductor layer comprise an oxide semiconductor comprising Zn.

16. The semiconductor device according to claim 14,

wherein the first oxide semiconductor layer includes a region which is provided between the source electrode layer and the drain electrode layer and whose thickness is smaller than that of a region overlapping with the source electrode layer or the drain electrode layer.

17. The semiconductor device according to claim 14,

wherein the gate electrode layer has a width in a channel direction which is larger than that of the second oxide semiconductor layer comprising insulating oxide and that of the first oxide semiconductor layer.

18. The semiconductor device according to claim 14,

wherein the first oxide semiconductor layer and the second oxide semiconductor layer comprising insulating oxide do not comprise a rare metal.