Interposer Package For CMOS Image Sensor And Method Of Making Same

• US 20130127000A1
• Filed: 11/21/2011
• Published: 05/23/2013
• Est. Priority Date: 11/21/2011
• Status: Active Grant

• Current Assignee: Optiz, Inc.
• Original Assignee: Optiz, Inc.
• Inventors: Oganesian, Vage
• Granted Patent: US 8,796,800 B2
• Time in Patent Office: Days
• US Class Current: 257/432
• CPC Class Codes: H01L 27/14618 Containers
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 31/18 Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof

Abstract

An image sensor package and method of manufacture that includes a crystalline handler with conductive elements extending therethrough, an image sensor chip disposed in a cavity of the handler, and a transparent substrate disposed over the cavity and bonded to both the handler and image sensor chip. The transparent substrate includes conductive traces that electrically connect the sensor chip'"'"'s contact pads to the handler'"'"'s conductive elements, so that off-chip signaling is provided by the substrate'"'"'s conductive traces and the handler'"'"'s conductive elements.

Claims

1. An image sensor package, comprising:

a handler assembly that includes;

a crystalline handler having opposing first and second surfaces, wherein the handler includes a cavity formed into the first surface, and

a plurality of conductive elements each extending from the first surface, through the crystalline handler, to the second surface;

a sensor chip disposed in the cavity, wherein the sensor chip includes;

a substrate with front and back opposing surfaces,

a plurality of photo detectors formed at the front surface, and a plurality of contact pads formed at the front surface which are electrically coupled to the photo detectors; and

a substrate assembly that includes;

a substrate having opposing top and bottom surfaces, wherein the substrate is optically transparent to at least one range of light wavelengths, and

a plurality of electrically conductive traces formed on the bottom surface;

wherein the substrate is disposed over the cavity and bonded to the crystalline handler and the sensor chip such that;

each of the contact pads is electrically connected to at least one of the electrically conductive traces, and

each of the electrically conductive traces is electrically connected to at least one of the conductive elements.

2. The image sensor package of claim 1, wherein for each of the contact pads, further comprising:

a first conductive pad disposed between and electrically connecting the contact pad and the at least one electrically conductive traces.

3. The image sensor package of claim 2, wherein for each of the electrically conductive traces, further comprising:

a second conductive pad disposed between and electrically connecting the electrically conductive trace and the at least one conductive element.

4. The image sensor package of claim 1, further comprising:

a plurality of surface mount interconnects each disposed over the second surface of the crystalline handler, and each electrically connected to one of the conductive elements.

5. The image sensor package of claim 1, wherein the sensor chip further comprises:

a plurality of color filters and microlenses mounted over the photo detectors.

6. The image sensor package of claim 1, wherein a portion of the substrate top surface disposed over the photo detectors is non-planar.

7. The image sensor package of claim 1, wherein the plurality of electrically conductive traces are insulated from the substrate by a compliant dielectric material.

8. A method of packaging a sensor chip that includes a substrate with front and back opposing surfaces, a plurality of photo detectors formed at the front surface, and a plurality of contact pads formed at the front surface which are electrically coupled to the photo detectors, the method comprising:

providing a crystalline handler having opposing first and second surfaces;

forming a cavity into the first surface;

forming a plurality of conductive elements each extending from the first surface, through the crystalline handler, to the second surface;

providing a substrate having opposing top and bottom surfaces, wherein the substrate is optically transparent to at least one range of light wavelengths;

forming a plurality of electrically conductive traces on the bottom surface;

inserting the sensor chip in the cavity;

bonding the substrate to the crystalline handler and the sensor chip such that;

the substrate is disposed over the cavity,

each of the contact pads is electrically connected to at least one of the electrically conductive traces, and

each of the electrically conductive traces is electrically connected to at least one of the conductive elements.

9. The method of claim 8, wherein the bonding of the substrate to the sensor chip is performed before the inserting of the sensor chip in the cavity and before the bonding of the substrate to the crystalline handler.

10. The method of claim 8, wherein the inserting of the sensor chip in the cavity is performed before the bonding of the substrate to the crystalline handler and the sensor chip.

11. The method of claim 8, further comprising:

forming a plurality of surface mount interconnects each disposed over the second surface of the crystalline handler, and each electrically connected to one of the conductive elements.

12. The method of claim 8, wherein a portion of the substrate top surface disposed over the photo detectors is non-planar.

13. The method of claim 8, further comprising:

forming a compliant dielectric material on the bottom surface, wherein the plurality of electrically conductive traces are insulated from the substrate by the compliant dielectric material.

14. A method of forming a plurality of image sensor packages, comprising:

providing a crystalline handler having opposing first and second surfaces;

forming a plurality of cavities into the first surface;

forming a plurality of conductive elements each extending from the first surface, through the crystalline handler, to the second surface;

providing a substrate having opposing top and bottom surfaces, wherein the substrate is optically transparent to at least one range of light wavelengths;

forming a plurality of electrically conductive traces on the bottom surface;

providing a plurality of sensor chips, wherein each of the sensor chips includes;

a substrate with front and back opposing surfaces, a plurality of photo detectors formed at the front surface, and

a plurality of contact pads formed at the front surface which are electrically coupled to the photo detectors;

inserting the sensor chips in the cavities;

bonding the substrate to the crystalline handler and the sensor chips such that;

the substrate is disposed over the cavities,

each of the contact pads is electrically connected to at least one of the electrically conductive traces, and

each of the electrically conductive traces is electrically connected to at least one of the conductive elements; and

cutting the crystalline handler and substrate to form separate packages each including one of the cavities and one of the sensor chips.

15. The method of claim 14, wherein the bonding of the substrate to the sensor chips is performed before the inserting of the sensor chips in the cavities and before the bonding of the substrate to the crystalline handler.

16. The method of claim 14, wherein the inserting of the sensor chips in the cavities is performed before the bonding of the substrate to the crystalline handler and the sensor chips.

17. The method of claim 14, further comprising:

forming a plurality of surface mount interconnects each disposed over the second surface of the crystalline handler, and each electrically connected to one of the conductive elements.

18. The method of claim 14, wherein portions of the substrate top surface disposed over the sensor chips is non-planar.

19. The method of claim 14, further comprising:

forming a compliant dielectric material on the bottom surface, wherein the plurality of electrically conductive traces are insulated from the substrate by the compliant dielectric material.