Hardware Automatic Performance State Transitions in System on Processor Sleep and Wake Events
First Claim
1. An apparatus comprising:
- a plurality of components, each component included in one of a plurality of performance domains;
a power management unit comprising a plurality of configuration registers, wherein the plurality of configuration registers are programmed with data identifying performance states for the plurality of performance domains, wherein at least two performance states are identified for each performance domain of the plurality of performance domains, and wherein the power management unit is configured to establish a selected performance state of the at least two performance states in each of the plurality of performance domains responsive to an event that is asynchronous to the programming of the plurality of configuration registers.
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Abstract
In an embodiment, a power management unit (PMU) may automatically transition (in hardware) the performance states of one or more performance domains in a system. The target performance states to which the performance domains are to transition may be programmable in the PMU by software, and software may signal the PMU that a processor in the system is to enter the sleep state. The PMU may control the transition of the performance domains to the target performance states, and may cause the processor to enter the sleep state. In an embodiment, the PMU may be programmable with a second set of target performance states to which the performance domains are to transition when the processor exits the sleep state. The PMU may control the transition of the performance domains to the second targeted performance states and cause the processor to exit the sleep state.
1 Citation
19 Claims
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1. An apparatus comprising:
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a plurality of components, each component included in one of a plurality of performance domains; a power management unit comprising a plurality of configuration registers, wherein the plurality of configuration registers are programmed with data identifying performance states for the plurality of performance domains, wherein at least two performance states are identified for each performance domain of the plurality of performance domains, and wherein the power management unit is configured to establish a selected performance state of the at least two performance states in each of the plurality of performance domains responsive to an event that is asynchronous to the programming of the plurality of configuration registers. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A method comprising:
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programming a plurality of configuration registers in a power management unit of an integrated circuit with data identifying performance states for the plurality of performance domains, wherein each of a plurality of components in the integrated circuit is included in one of the plurality of performance domains, and wherein at least two performance states are identified for each performance domain of the plurality of performance domains; and the power management unit establishing a selected performance state of the at least two performance states in each of the plurality of performance domains responsive to an event that is asynchronous to the programming of the plurality of configuration registers. - View Dependent Claims (8, 9, 10, 11, 12, 13, 14)
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15. A computer accessible storage medium storing:
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a plurality of drivers, each of the plurality of drivers corresponding to a respective component of a plurality of components of a system, wherein the plurality of drivers each comprise instructions which, when executed by a processor on the system, control the respective component; and a power management unit driver comprising instructions which, when executed by the processor, control a power management unit in the system, wherein the power management unit driver is configured to program a plurality of configuration registers in the power management unit with data indicating one or more performance states for each performance domain of a plurality of performance domains in the system, and wherein each of the plurality of components is included in one of the plurality of performance domains; and wherein a first driver of the plurality of drivers is configured to request activation of a first component of the plurality of components, and wherein the power management unit driver is configured to program one or more of the plurality of configuration registers responsive to the request from the first driver. - View Dependent Claims (16, 17, 18, 19)
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Specification