SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

• US 20130237013A1
• Filed: 04/11/2013
• Published: 09/12/2013
• Est. Priority Date: 12/08/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: YAMAZAKI, Shunpei
• Granted Patent: US 8,946,097 B2
• Time in Patent Office: Days
• US Class Current: 438/104
• CPC Class Codes: H01L 21/3003 Hydrogenation or deuterisation, e.g. using atomic hydrogen from a plasma
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

A manufacturing method of a semiconductor device, which includes the steps of forming a gate electrode layer over a substrate having an insulating surface, forming a gate insulating layer over the gate electrode layer, forming an oxide semiconductor layer over the gate insulating layer, forming a source electrode layer and a drain electrode layer over the oxide semiconductor layer, forming an insulating layer including oxygen over the oxide semiconductor layer, the source electrode layer, and the drain electrode layer, and after formation of an insulating layer including hydrogen over the insulating layer including oxygen, performing heat treatment so that hydrogen in the insulating layer including hydrogen is supplied to at least the oxide semiconductor layer.

Claims

1. A method for manufacturing a semiconductor device, the method comprising the steps of:

forming a gate electrode;

forming a first insulating layer over the gate electrode;

forming an oxide semiconductor layer over the first insulating layer; and

performing a first heat treatment after forming the oxide semiconductor layer;

wherein the first heat treatment is performed first in an inert gas atmosphere and then in a gas comprising oxygen.

2. The method according to claim 1, wherein the oxide semiconductor layer comprises indium and zinc.

3. The method according to claim 2, wherein the oxide semiconductor layer further comprises gallium.

4. The method according to claim 1, wherein the oxide semiconductor layer comprises a crystalline region having a crystal grain size greater than or equal to 1 nm and less than or equal to 20 nm.

5. The method according to claim 1, further comprising the step of forming a source electrode and a drain electrode over the oxide semiconductor layer after performing the first heat treatment.

6. The method according to claim 1, wherein the inert gas atmosphere is switched to the gas comprising oxygen during the first heat treatment.

7. The method according to claim 1, the method further comprising the steps of:

forming a second insulating layer over the oxide semiconductor layer;

forming a third insulating layer comprising hydrogen over the second insulating layer; and

after forming the third insulating layer, performing a second heat treatment so that hydrogen in the third insulating layer is supplied to at least the oxide semiconductor layer.

8. The method according to claim 7, wherein the third insulating layer is a silicon nitride layer.

9. A method for manufacturing a semiconductor device, the method comprising the steps of:

forming a gate electrode;

forming a first insulating layer over the gate electrode;

forming an oxide semiconductor layer over the first insulating layer; and

performing a first heat treatment after forming the oxide semiconductor layer;

wherein the first heat treatment is performed first in an inert gas atmosphere and then in a gas comprising oxygen, and

wherein the first heat treatment is a gas rapid thermal annealing process.

10. The method according to claim 9, wherein the oxide semiconductor layer comprises indium and zinc.

11. The method according to claim 10, wherein the oxide semiconductor layer further comprises gallium.

12. The method according to claim 9, wherein the oxide semiconductor layer comprises a crystalline region having a crystal grain size greater than or equal to 1 nm and less than or equal to 20 nm.

13. The method according to claim 9, further comprising the step of forming a source electrode and a drain electrode over the oxide semiconductor layer after performing the first heat treatment.

14. The method according to claim 9, wherein the inert gas atmosphere is switched to the gas comprising oxygen during the first heat treatment.

15. The method according to claim 9, the method further comprising the steps of:

forming a second insulating layer over the oxide semiconductor layer;

forming a third insulating layer comprising hydrogen over the second insulating layer; and

after forming the third insulating layer, performing a second heat treatment so that hydrogen in the third insulating layer is supplied to at least the oxide semiconductor layer.

16. The method according to claim 15, wherein the third insulating layer is a silicon nitride layer.

17. A method for manufacturing a semiconductor device, the method comprising the steps of:

forming a gate electrode;

forming a first insulating layer over the gate electrode;

forming an oxide semiconductor layer over the first insulating layer; and

performing a first heat treatment after forming the oxide semiconductor layer;

wherein the first heat treatment is performed first in an inert gas atmosphere and then in a gas comprising oxygen, and

wherein the first heat treatment is performed at a temperature higher than or equal to 650°

C. and lower than or equal to 700°

C.

18. The method according to claim 17, wherein the oxide semiconductor layer comprises indium and zinc.

19. The method according to claim 18, wherein the oxide semiconductor layer further comprises gallium.

20. The method according to claim 17, wherein the oxide semiconductor layer comprises a crystalline region having a crystal grain size greater than or equal to 1 nm and less than or equal to 20 nm.

21. The method according to claim 17, further comprising the step of forming a source electrode and a drain electrode over the oxide semiconductor layer after performing the first heat treatment.

22. The method according to claim 17, wherein the inert gas atmosphere is switched to the gas comprising oxygen during the first heat treatment.

23. The method according to claim 17, the method further comprising the steps of:

forming a second insulating layer over the oxide semiconductor layer;

forming a third insulating layer comprising hydrogen over the second insulating layer; and

after forming the third insulating layer, performing a second heat treatment so that hydrogen in the third insulating layer is supplied to at least the oxide semiconductor layer.

24. The method according to claim 23, wherein the third insulating layer is a silicon nitride layer.

25. A method for manufacturing a semiconductor device, the method comprising the steps of:

forming an oxide semiconductor layer on an insulating surface;

forming an oxide insulating film containing oxygen over the oxide semiconductor layer;

performing a heat treatment to supply oxygen to the oxide semiconductor layer; and

forming a second insulating film comprising silicon nitride over the oxide insulating film.

26. The method according to claim 25, wherein the second insulating film contains hydrogen.

27. The method according to claim 25, wherein the oxide insulating film is in direct contact with the oxide semiconductor layer.

28. The method according to claim 25, wherein the oxide insulating film comprises silicon oxide.

29. The method according to claim 25, wherein the oxide semiconductor layer comprises indium, zinc, and oxygen.

30. The method according to claim 25, wherein the oxide insulating film has a thickness within a range from 50 to 200 nm.

31. The method according to claim 25, wherein the heat treatment is performed at a temperature higher than or equal to 200°

C. and lower than or equal to 450°

C.

32. The method according to claim 25, wherein the oxide semiconductor layer has crystallinity.

33. A method for manufacturing a semiconductor device, the method comprising the steps of:

forming an oxide semiconductor layer on an insulating surface;

forming an oxide insulating film containing oxygen over the oxide semiconductor layer;

performing a heat treatment to supply oxygen to the oxide semiconductor layer from the oxide insulating film; and

forming a second insulating film comprising silicon nitride over the oxide insulating film.

34. The method according to claim 33, wherein the second insulating film contains hydrogen.

35. The method according to claim 33, wherein the oxide insulating film is in direct contact with the oxide semiconductor layer.

36. The method according to claim 33, wherein the oxide insulating film comprises silicon oxide.

37. The method according to claim 33, wherein the oxide semiconductor layer comprises indium, zinc, and oxygen.

38. The method according to claim 33, wherein the oxide insulating film has a thickness within a range from 50 to 200 nm.

39. The method according to claim 33, wherein the heat treatment is performed at a temperature higher than or equal to 200°

C. and lower than or equal to 450°

C.

40. The method according to claim 33, wherein the oxide semiconductor layer has crystallinity.

41. A method for manufacturing a semiconductor device, the method comprising the steps of:

forming a gate electrode over a substrate;

forming a gate insulating layer over the gate electrode;

forming an oxide semiconductor layer over the gate electrode with the gate insulating layer interposed therebetween;

forming an oxide insulating film containing oxygen over the oxide semiconductor layer;

performing a heat treatment to supply oxygen to the oxide semiconductor layer; and

forming a second insulating film comprising silicon nitride over the oxide insulating film.

42. The method according to claim 41, wherein the second insulating film contains hydrogen.

43. The method according to claim 41, wherein the oxide insulating film is in direct contact with the oxide semiconductor layer.

44. The method according to claim 41, wherein the oxide insulating film comprises silicon oxide.

45. The method according to claim 41, wherein the oxide semiconductor layer comprises indium, zinc, and oxygen.

46. The method according to claim 41, wherein the oxide insulating film has a thickness within a range from 50 to 200 nm.

47. The method according to claim 41, wherein the heat treatment is performed at a temperature higher than or equal to 200°

C. and lower than or equal to 450°

C.

48. The method according to claim 41, wherein the oxide semiconductor layer has crystallinity.

49. A method for manufacturing a semiconductor device, the method comprising the steps of:

forming a gate electrode over a substrate;

forming a gate insulating layer over the gate electrode;

forming an oxide semiconductor layer over the gate electrode with the gate insulating layer interposed therebetween;

forming an oxide insulating film containing oxygen over the oxide semiconductor layer;

performing a heat treatment to supply oxygen to the oxide semiconductor layer from the oxide insulating film; and

forming a second insulating film comprising silicon nitride over the oxide insulating film.

50. The method according to claim 49, wherein the second insulating film contains hydrogen.

51. The method according to claim 49, wherein the oxide insulating film is in direct contact with the oxide semiconductor layer.

52. The method according to claim 49, wherein the oxide insulating film comprises silicon oxide.

53. The method according to claim 49, wherein the oxide semiconductor layer comprises indium, zinc, and oxygen.

54. The method according to claim 49, wherein the oxide insulating film has a thickness within a range from 50 to 200 nm.

55. The method according to claim 49, wherein the heat treatment is performed at a temperature higher than or equal to 200°

C. and lower than or equal to 450°

C.

56. The method according to claim 49, wherein the oxide semiconductor layer has crystallinity.