THIN FILM TRANSISTOR, MANUFACTURING METHOD THEREFOR, AND DISPLAY DEVICE

• US 20130334530A1
• Filed: 03/02/2012
• Published: 12/19/2013
• Est. Priority Date: 03/11/2011
• Status: Active Grant

• Current Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Original Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Inventors: Katoh, Sumio, Kitakado, Hidehito
• Granted Patent: US 9,236,496 B2
• Time in Patent Office: Days
• US Class Current: 257/43
• CPC Class Codes: H01L 27/1222 with a particular composition, shape or crystalline structure of the active layer
• CPC Class Codes: H01L 29/41733 for thin film transistors with insulated gate
• CPC Class Codes: H01L 29/78609 for preventing leakage current H01L29/78618 takes precedence
• CPC Class Codes: H01L 29/78618 characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure silicide contacts, electrodes in general H01L29/458
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78693 the semiconducting oxide being amorphous
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621
• CPC Class Codes: H01L 33/0041 characterised by field-effect operation

Abstract

The invention provides a thin film transistor that can reduce an off-current flowing in end-parts in a channel width direction of a channel layer and a manufacturing method therefor.

Widths of a source electrode (160a) and a drain electrode (160b) are smaller than a width of a channel layer (140). Accordingly, in the channel layer (140), low resistance regions (140b) are formed to surround respectively the source electrode (160a) and the drain electrode (160b). A high resistance region (140a) having a higher resistance value than those of the low resistance regions (140b) remains not only in the region sandwiched between the two low resistance regions (140b), but also in the end parts in the channel width direction. As a result, in a TFT (100), the high resistance region (140a) is extended not only to the channel region sandwiched between the source electrode (160a) and the drain electrode (160b), but also to the end parts in the channel width direction. Accordingly, the off-current flowing through the end parts in the channel width direction reduces.

Claims

1-18. -18. (canceled)

19. :

A thin film transistor formed on an insulating substrate, comprising;

a gate electrode formed on the insulating substrate;

a gate insulating film formed to cover the gate electrode;

a source electrode and a drain electrode formed on the gate insulating film with a predetermined distance, to sandwich the gate electrode; and

a channel layer made of an oxide semiconductor layer which is formed in a region sandwiched between the source electrode and the drain electrode and of which one end and the other end are respectively electrically connected to the source electrode and the drain electrode,

wherein the channel layer includes two first regions each having a width larger than the source electrode and the drain electrode and having a first resistance value, and a second region sandwiched between the two first regions and having a second resistance value higher than the first resistance value, and

the second region is extended to end parts in a channel width direction.

20. :

The thin film transistor according to claim 19, wherein the source electrode and the drain electrode are formed to be overlapped with the gate electrode in a planar view.

21. :

The thin film transistor according to claim 19, wherein the source electrode and the drain electrode are formed not to be overlapped with the gate electrode in a planar view.

22. :

The thin film transistor according to claim 21, wherein the first region is formed to be overlapped with the gate electrode in a planar view.

23. :

The thin film transistor according to claim 19, wherein one of the source electrode and the drain electrode is formed to be overlapped with the gate electrode in a planar view, and the other is formed not to be overlapped with the gate electrode in a planar view.

24. :

The thin film transistor according to claim 20, wherein the source electrode is formed to cover one end of the channel layer, and the drain electrode is formed to cover the other end of the channel layer.

25. :

The thin film transistor according to claim 20, further comprising an etching stopper layer formed to cover the second region, on the channel layer in a region sandwiched between the end part of the source electrode and the end part of the drain electrode,

wherein the source electrode and the drain electrode are respectively electrically connected to the two first regions of the channel layer via a contact hole formed in the etching stopper layer.

26. :

The thin film transistor according to claim 20, wherein one end of the channel layer is electrically connected to the source electrode by covering one end of the source electrode, and the other end of the channel layer is electrically connected to the drain electrode by covering one end of the drain electrode.

27. :

The thin film transistor according to claim 20, further comprising an interlayer insulating layer which covers the source electrode and the drain electrode,

wherein one end of the channel layer is electrically connected to the source electrode via a contact hole opened in the interlayer insulating layer on the source electrode, and the other end of the channel layer is electrically connected to the drain electrode via a contact hole opened in the interlayer insulating layer on the drain electrode.

28. :

The thin film transistor according to claim 19, wherein a desired combination of a channel length and a channel width is selected from among data of a plurality of combinations of channel lengths and channel widths determined such that an off-current becomes smaller than a predetermined current value.

29. :

The thin film transistor according to claim 19, wherein the channel layer is made of an indium gallium zinc oxide layer, and the source electrode and the drain electrode have a titanium film that is in contact with the indium gallium zinc oxide layer.

30. :

The thin film transistor according to claim 19, wherein the oxide semiconductor layer is made of a microcrystalline oxide semiconductor layer.

34. :

An active matrix-type display device for displaying an image, the device comprising;

the first thin film transistor according to claim 19;

an auxiliary capacitance part including a lower electrode, an upper electrode, and an insulating film formed between the lower electrode and the upper electrode;

an intersection part where a gate electrode of the first thin film transistor intersects with one of a source electrode and a drain electrode; and

a contact part where the gate electrode is electrically connected to one of the source electrode and the drain electrode by a connection electrode,

wherein the lower electrode is formed when the gate electrode of the first thin film transistor is formed,

the upper electrode is formed when the source electrode and the drain electrode of the first thin film transistor are formed, and

the insulating film is formed when a gate insulating film of the first thin film transistor is formed.

35. :

An active matrix-type display device for displaying an image, the device comprising;

the thin film transistor according to claim 25;

an auxiliary capacitance part including a lower electrode, an upper electrode, and an insulating film formed between the lower electrode and the upper electrode;

an intersection part where a gate electrode of the thin film transistor intersects with one of a source electrode and a drain electrode; and

a contact part where the gate electrode is electrically connected to one of the source electrode and the drain electrode by a connection electrode, wherein

the insulating film of the auxiliary capacitance part includes a first insulating film formed when the gate insulating film of the thin film transistor is formed, and

the intersection part includes the first insulating film, and a second insulating film formed when the etching stopper layer of the thin film transistor is formed.

36. :

The display device according to claim 34, wherein in the contact part, the connection electrode for electrically connecting the gate electrode to one of the source electrode and the drain electrode is made of a transparent metal film.

31. :

A manufacturing method for a thin film transistor formed on an insulating substrate, the method comprising the steps of;

forming a gate electrode on an insulating substrate;

forming a gate insulating film to cover the gate electrode;

forming a channel layer made of an oxide semiconductor layer, on the gate insulating film;

forming a source electrode and a drain electrode, on the gate insulating film; and

performing first annealing, after forming a passivation film which covers the insulating substrate,

wherein the passivation film is made of a silicon oxide film.

32. :

The manufacturing method for a thin film transistor according to claim 31, wherein the first annealing is performed for 0.5 hour to 2 hours (inclusive) at a temperature of 250°

C. to 350°

C. (inclusive) in an atmosphere containing oxygen.

33. :

The manufacturing method for a thin film transistor according to claim 32, further comprising the steps of;

forming an etching stopper layer made of a silicon oxide layer, on the channel layer; and

a

performing second annealing after forming the etching stopper layer,

wherein the second annealing is performed for 0.5 hour to 2 hours (inclusive) at a temperature of 200°

C. to 350°

C. (inclusive) in the atmosphere containing oxygen.