Method and Apparatus of an Input Resistance of a Passive Mixer to Broaden the Input Matching Bandwidth of a Common Source-Gate LNA

• US 20140097894A1
• Filed: 12/16/2013
• Published: 04/10/2014
• Est. Priority Date: 12/06/2011
• Status: Active Grant

• Current Assignee: Tensorcom Inc
• Original Assignee: Tensorcom Inc
• Inventors: Soe, Zaw
• Granted Patent: US 9,287,836 B2
• Time in Patent Office: Days
• US Class Current: 330/188
• CPC Class Codes: H03D 7/125 with field effect transistors
• CPC Class Codes: H03D 7/1441 using field-effect transistors H03D7/145 takes precedence
• CPC Class Codes: H03D 7/1466 Passive mixer arrangements
• CPC Class Codes: H03D 7/165 at least two frequency changers being located in different paths, e.g. in two paths with carriers in quadrature combined with amplitude demodulation H03D1/2245, combined with angle demodulation H03D3/007; N-path filters H03H19/002
• CPC Class Codes: H03F 1/223 with MOSFET's
• CPC Class Codes: H03F 1/42 Modifications of amplifiers to extend the bandwidth
• CPC Class Codes: H03F 2200/108 A coil being added in the drain circuit of a FET amplifier stage, e.g. for noise reducing purposes
• CPC Class Codes: H03F 2200/294 the amplifier being a low noise amplifier [LNA]
• CPC Class Codes: H03F 2200/451 the amplifier being a radio frequency amplifier
• CPC Class Codes: H03F 2200/492 A coil being added in the source circuit of a transistor amplifier stage as degenerating element
• CPC Class Codes: H03F 2200/72 the amplifier stage being a common gate configuration MOSFET
• CPC Class Codes: H03F 2200/75 the amplifier stage being a common source configuration MOSFET
• CPC Class Codes: H03F 3/193 with field-effect devices H03F3/195 takes precedence
• CPC Class Codes: H03F 3/387 with semiconductor devices only
• CPC Class Codes: H03F 3/45071 with semiconductor devices only
• CPC Class Codes: H03F 3/45179 using MOSFET transistors as the active amplifying circuit H03F3/45278 takes precedence
• CPC Class Codes: H04L 27/38 Demodulator circuits; Receiver circuits

Abstract

A cascode common source and common gate LNAs operating at 60 GHz are introduced and described. The cascode common source LNA is simulated to arrive at an optimum ratio of upper device width to the lower device width. The voltage output of the cascode common source LNA is translated into a current to feed and apply energy to the mixer stage. These input current signals apply the energy associated with the current directly into the switched capacitors in the mixer to minimize the overall power dissipation of the system. The LNA is capacitively coupled to the mixer switches in the I and Q mixers and are enabled and disabled by the clocks generated by the quadrature oscillator. These signals are then amplified by a differential amplifier to generate the sum and difference frequency spectra.

Claims

1. A receiver comprising:

a Low Noise Amplifier (LNA) coupled to a resonant circuit providing an output signal spectrum;

a capacitor couples the output signal spectrum to a first switched capacitor circuit;

an oscillator clock coupled to the first switched capacitor circuit;

the first switched capacitor circuit presents a first impedance to the resonant circuit; and

the first switched capacitor circuit is configured to mix the oscillator clock and the output signal spectrum into a first mixed signal.

2. The receiver of claim 1, wherein

the first impedance of the first switched capacitor circuit adjusts a Q of the resonant circuit.

3. The receiver of claim 1, further comprising:

the output signal spectrum coupled to a second switched capacitor circuit;

an inverse oscillator clock coupled to the second switched capacitor circuit;

the second switched capacitor circuit presents a second impedance to the resonant circuit; and

the second switched capacitor circuit is configured to mix the inverse oscillator clock and the output signal spectrum into a second mixed signal.

4. The receiver of claim 3, wherein

the first mixed signal and the second mixed signal is a differential intermediate frequency signal.

5. The receiver of claim 4, further comprising:

a differential amplifier coupled to the differential intermediate frequency signal.

6. The receiver of claim 5, wherein

the first switched capacitor circuit and the second switched capacitor circuit comprise a first mixer.

7. The receiver of claim 6, wherein

energy from the resonant circuit is used to power the first mixer.

8. A cascade structure device comprising:

a first spiral inductor coupled to a source of a first transistor,

a second spiral inductor coupled to a drain of a second transistor;

a third inductor connecting the first transistor to the second transistor;

a first capacitor coupled in parallel to the third inductor forming a bandpass filter; and

a second capacitor coupled in parallel to the second spiral inductor forming a resonant circuit, wherein the resonate circuit oscillates at a center frequency.

9. The apparatus of claim 8, wherein

the resonate circuit oscillates at a lower frequency than the center frequency when a width of the second transistor is less than a width of the first transistor.

10. The apparatus of claim 8, wherein

the resonate circuit oscillates at a higher frequency than the center frequency when a width of the second transistor is greater than a width of the first transistor.

11. The apparatus of claim 8, further comprising:

a drain of a third transistor coupled to a gate of a fourth transistor with a first width;

a source of the third transistor coupled to the resonant circuit;

an oscillator clock configured to operate at a first frequency enables the third transistor; and

the third transistor presents a first impedance to the resonant circuit causing the resonant circuit to have a first bandwidth.

12. The apparatus of claim 11, wherein

the resonate circuit has a wider bandwidth than the first bandwidth when either the a frequency of the oscillator clock is larger than the first frequency, a width of the fourth transistor is larger than the first width, or both are increased simultaneously.

13. The apparatus of claim 11, further comprising:

the resonate circuit has a narrower bandwidth than the first bandwidth when either the a frequency of the oscillator clock is less than the first frequency, a width of the fourth transistor is less than the first width, or both are decreased simultaneously.

14. A method of operating a cascade structure device comprising:

coupling a first spiral inductor to a source of a first transistor;

coupling a second spiral inductor to a drain of a second transistor;

connecting a third inductor between the first transistor to the second transistor;

forming a bandpass filter by coupling a first capacitor in parallel to the third inductor; and

forming a resonant circuit by coupling a second capacitor in parallel to the second spiral inductor, wherein the resonate circuit oscillates at a center frequency.

15. The method of claim 14, wherein

the resonate circuit oscillates at a lower frequency than the center frequency when a width of the second transistor is less than a width of the first transistor.

16. The method of claim 14, wherein

the resonate circuit oscillates at a higher frequency than the center frequency when a width of the second transistor is greater than a width of the first transistor.

17. The method of claim 14, further comprising the steps of:

coupling a drain of a third transistor to a gate of a fourth transistor with a first width;

coupling a source of the third transistor to the resonant circuit; and

configuring an oscillator clock to operate at a first frequency to enable the third transistor; and

presenting a first impedance of the third transistor to the resonant circuit causing the resonant circuit to have a first bandwidth.

18. The method of claim 17, wherein

the resonate circuit has a wider bandwidth than the first bandwidth when either the a frequency of the oscillator clock is larger than the first frequency, a width of the fourth transistor is larger than the first width, or both are increased simultaneously.

19. The method of claim 17, further comprising the steps of:

the resonate circuit has a narrower bandwidth than the first bandwidth when either the a frequency of the oscillator clock is less than the first frequency, a width of the fourth transistor is less than the first width, or both are decreased simultaneously.

20. The receiver of claim 17, wherein

energy from the resonant circuit is used to charge the gate of the fourth transistor.