LIQUID CRYSTAL DISPLAY AND MANUFACTURING METHOD THEREOF

• US 20140118673A1
• Filed: 03/14/2013
• Published: 05/01/2014
• Est. Priority Date: 11/01/2012
• Status: Active Grant

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Inventors: PARK, Gyung-Soon, KIM, Il Gon
• Granted Patent: US 9,086,587 B2
• Time in Patent Office: Days
• US Class Current: 349/138
• CPC Class Codes: G02F 1/133345 Insulating layers G02F1/1335, G02F1/1337, G02F1/135, G02F1/136 take precedence
• CPC Class Codes: G02F 1/13394 spacers regularly patterned on the cell subtrate, e.g. walls, pillars G02F1/133377 takes precedence
• CPC Class Codes: G02F 1/134363 for applying an electric field parallel to the substrate, i.e. in-plane switching [IPS]
• CPC Class Codes: G02F 1/134372 for fringe field switching [FFS] where the common electrode is not patterned
• CPC Class Codes: G02F 1/136209 Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
• CPC Class Codes: G02F 2201/40 Arrangements for improving the aperture ratio

Abstract

In a liquid crystal display (LCD), a thickness of a passivation layer overlapping signal lines is larger than a thickness of portion of the passivation layer not overlapping signal lines. A spacer may be formed to overlap the signal lines. In an aperture region of the LCD, a thickness of the passivation layer between a common electrode and a pixel electrode is relatively small, and therefore, it may be possible to prevent reduction in the intensity of the electric field between the common electrode and the pixel electrode. Since thickness of the passivation layer may be relatively large, it may be possible to prevent a signal delay of common voltage. A spacer may be formed overlapping signal lines with relatively thick passivation layer. The spacer may have a small height. Cell gap may be adjusted to be uniform, and prevent reduction in aperture ratio of the LCD.

Claims

1. A liquid crystal display, comprising:

a first substrate;

a first field generating electrode and a second field generating electrode disposed on the first substrate, the first electrode overlapping the second electrode;

an insulating layer disposed between the first electrode and the second electrode; and

a first signal line and a second signal line disposed on the first substrate, the first signal line and the second signal line being connected to the first field generating electrode,

wherein the insulating layer comprises a passivation layer disposed between the second signal line and the second field generating electrode,

wherein the passivation layer comprises a first portion overlapping the first signal line and the second signal line and a second portion not overlapping the first signal line and the second signal line, and

wherein a thickness of the first portion is larger than a thickness of the second portion.

2. The liquid crystal display of claim 1, wherein:

the first portion of the passivation layer comprises a first passivation layer and a second passivation layer disposed on the first passivation layer, and

a second portion of the passivation layer comprises the first passivation layer.

3. The liquid crystal display of claim 2, wherein:

the first passivation layer and the second passivation layer have different etching rates.

4. The liquid crystal display of claim 3, further comprising:

a second substrate facing the first substrate; and

a spacer disposed between the first substrate and the second substrate,

wherein the spacer overlaps the first portion of the passivation layer.

5. The liquid crystal display of claim 4, further comprising:

a gate insulating layer disposed between the first signal line and the second signal line,

wherein the first field generating electrode is disposed below the gate insulating layer.

6. The liquid crystal display of claim 4, further comprising:

a gate insulating layer disposed between the first signal line and the second signal line,

wherein the first field generating electrode is disposed on the gate insulating layer.

7. The liquid crystal display of claim 1, further comprising:

a second substrate facing the first substrate; and

a spacer disposed between the first insulation substrate and the second insulation substrate,

wherein the spacer overlaps the first portion of the passivation layer.

8. The liquid crystal display of claim 7, further comprising:

a gate insulating layer disposed between the first signal line and the second signal line,

wherein the first field generating electrode is disposed below the gate insulating layer.

9. The liquid crystal display of claim 7, further comprising:

a gate insulating layer disposed between the first signal line and the second signal line,

wherein the first field generating electrode is disposed on the gate insulating layer.

10. The liquid crystal display of claim 1, further comprising:

a gate insulating layer disposed between the first signal line and the second signal line,

wherein the first field generating electrode is disposed below the gate insulating layer.

11. The liquid crystal display of claim 1, further comprising:

a gate insulating layer disposed between the first signal line and the second signal line,

wherein the first field generating electrode is disposed on the gate insulating layer.

12. A method of manufacturing a liquid crystal display, comprising:

forming a first signal line and a second signal line on a first substrate;

forming a passivation layer on the first signal line and the second signal line;

forming a photosensitive film on the passivation layer;

exposing the photosensitive film using the first signal line and the second signal line as a photomask;

forming a photosensitive film pattern by printing the exposed photosensitive film;

forming a passivation layer having a first portion and a second portion by etching a part of the passivation layer using the photosensitive film pattern as an etching mask, the first portion having a first thickness and the second portion having a second thickness smaller than the first thickness; and

forming a first field generating electrode on the passivation layer.

13. The method of claim 12, wherein forming the passivation layer comprises:

forming a first passivation layer on the first signal line and the second signal line; and

forming a second passivation layer on the first passivation layer, and

wherein the etching of the part of the passivation layer comprises etching the second passivation layer of the passivation layer.

14. The method of claim 13, further comprising:

forming a spacer overlapping the first portion of the passivation layer.

15. The method of claim 14, further comprising:

forming a second field generating electrode overlapping the first field generating electrode on the substrate, the passivation layer being formed between the first electrode and the second electrode.

16. The method of claim 15, wherein forming the first signal line and the second signal line comprises:

forming an insulating layer between the first signal line and the second signal line, and

wherein forming the second field generating electrode comprises forming the second field generating electrode below the insulating layer.

17. The method of claim 15, wherein forming the first signal line and the second signal line comprises:

forming an insulating layer between the first signal line and the second signal line, and

wherein forming the second field generating electrode comprises forming the second field generating electrode on the insulating layer.

18. The method of claim 12, further comprising:

forming a spacer overlapping the first portion of the passivation layer.

19. The method of claim 18, further comprising:

forming a second field generating electrode overlapping the first field generating electrode on the substrate, the passivation layer being formed between the first electrode and the second electrode.

20. The method of claim 19, wherein:

forming the first signal line and the second signal line comprises forming an insulating layer between the first signal line and the second signal line, and

wherein forming the second field generating electrode comprises forming disposes the second field generating electrode below the insulating layer.

21. The method of claim 19, wherein forming the first signal line and a second signal line comprises:

forming an insulating layer between the first signal line and the second signal line, and

wherein forming the second field generating electrode comprises forming the second field generating electrode on the insulating layer.

22. The method of claim 12, further comprising:

forming a second field generating electrode overlapping the first field generating electrode on the substrate, the passivation layer being formed between the first electrode and the second electrode.

23. The method of claim 22, wherein forming the first signal line and the second signal line comprises:

forming an insulating layer between the first signal line and the second signal line, and

wherein forming the second field generating electrode comprises forming the second field generating electrode below the insulating layer.

24. The method of claim 22, wherein forming the first signal line and the second signal line comprises:

forming an insulating layer between the first signal line and the second signal line, and

wherein forming the second field generating electrode comprises forming the second field generating electrode on the insulating layer.