On-Device Data Analytics Using NAND Flash Based Intelligent Memory
First Claim
1. A method of analyzing data, comprising:
- writing a plurality of data sets selected by a host in a memory array of a NAND architecture of NAND strings formed along bit lines and spanned by word lines, where the data sets are written oriented along the bit lines with corresponding data elements arranged to lie along the same word lines;
concurrently biasing a plurality of word lines to a first set of sensing voltage levels corresponding to host determined parameter values; and
determining those of the bit lines that conduct in response to said biasing of a plurality of word lines to the first set of sensing voltage levels.
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Accused Products
Abstract
A NAND Flash based content addressable memory (CAM) is used for a key-value addressed storage drive. The device can use a standard transport protocol such as PCI-E, SAS, SATA, eMMC, SCSI, and so on. A host writes a key-value pair to the drive, where the drive writes the keys along bit lines of a CAM NAND portion of the drive and stores the value in the drive. The drive then maintains a table linking the keys to location of the value. In a read process, the host provides a key to drive, which then broadcasts down the word lines of blocks storing the keys. Based on any matching bit lines, the tables can then be used to retrieve and supply the corresponding data to the host. The system can be applied to perform a wide range of analytics on data sets loaded into the NAND array.
25 Citations
36 Claims
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1. A method of analyzing data, comprising:
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writing a plurality of data sets selected by a host in a memory array of a NAND architecture of NAND strings formed along bit lines and spanned by word lines, where the data sets are written oriented along the bit lines with corresponding data elements arranged to lie along the same word lines; concurrently biasing a plurality of word lines to a first set of sensing voltage levels corresponding to host determined parameter values; and determining those of the bit lines that conduct in response to said biasing of a plurality of word lines to the first set of sensing voltage levels. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36)
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Specification