COMBINATION FINFET AND PLANAR FET SEMICONDUCTOR DEVICE AND METHODS OF MAKING SUCH A DEVICE

  • US 20140151807A1
  • Filed: 12/05/2012
  • Published: 06/05/2014
  • Est. Priority Date: 12/05/2012
  • Status: Active Grant
First Claim
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1. A device, comprising:

  • a substantially un-doped layer of a semiconducting material;

    a plurality of trenches defined in said substantially un-doped layer of semiconducting material, said trenches defining a plurality of fins;

    a gate insulation layer positioned on said fins and on a bottom surface of said trenches;

    a gate electrode positioned on said gate insulation layer; and

    a device isolation structure defined in said substantially un-doped layer of semiconducting material.

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