SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME

• US 20140183523A1
• Filed: 12/19/2013
• Published: 07/03/2014
• Est. Priority Date: 12/28/2012
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: ENDO, Yuta
• Granted Patent: US 9,196,639 B2
• Time in Patent Office: Days
• US Class Current: 257/43
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 27/1259 Multistep manufacturing methods
• CPC Class Codes: H01L 28/60 Electrodes
• CPC Class Codes: H01L 29/04 characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes characterised by physical imperfections H01L29/30
• CPC Class Codes: H01L 29/24 including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22 including organic materials H10K99/00
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H01L 29/517 the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate H01L29/518 takes precedence
• CPC Class Codes: H01L 29/518 the insulating material containing nitrogen, e.g. nitride, oxynitride, nitrogen-doped material
• CPC Class Codes: H01L 29/78603 characterised by the insulating substrate or support H01L29/78657 takes precedence
• CPC Class Codes: H01L 29/78606 with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device H01L29/78642, H01L29/78645 take precedence
• CPC Class Codes: H01L 29/78648 arranged on opposing sides of the channel
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

A semiconductor device with high aperture ratio is provided. The semiconductor device includes a nitride insulating film, a transistor over the nitride insulating film, and a capacitor including a pair of electrodes over the nitride insulating film. An oxide semiconductor layer is used for a channel formation region of the transistor and one of the electrodes of the capacitor. A transparent conductive film is used for the other electrode of the capacitor. One electrode of the capacitor is in contact with the nitride insulating film, and the other electrode of the capacitor is electrically connected to one of a source electrode and a drain electrode of the transistor.

Claims

1. A semiconductor device comprising a capacitor element, comprising:

a first insulating layer including nitrogen;

a gate electrode layer over the first insulating layer;

a second insulating layer over the gate electrode layer;

a first oxide semiconductor layer over the second insulating layer, the first oxide semiconductor layer overlapping with the gate electrode layer;

a second oxide semiconductor layer over and in contact with the first insulating layer;

a source electrode layer and a drain electrode layer electrically connected to the first oxide semiconductor layer;

a third insulating layer over and in contact with the first oxide semiconductor layer and the second oxide semiconductor layer; and

a transparent conductive layer over the third insulating layer, the transparent conductive layer overlapping with the second oxide semiconductor layer,

wherein one of electrodes of the capacitor element is the second oxide semiconductor layer.

2. The semiconductor device according to claim 1, wherein the other of the electrodes of the capacitor element is the transparent conductive layer.

3. The semiconductor device according to claim 1, wherein the first oxide semiconductor layer and the second oxide semiconductor layer include the same material.

4. The semiconductor device according to claim 1, wherein the first oxide semiconductor layer and the second oxide semiconductor layer have an energy gap of 2.0 eV or more.

5. The semiconductor device according to claim 1, wherein the first insulating layer includes a nitride insulating material selected from silicon nitride oxide, silicon nitride, aluminum nitride, and aluminum nitride oxide.

6. The semiconductor device according to claim 1, wherein the first insulating layer further includes hydrogen.

7. The semiconductor device according to claim 1, wherein the third insulating layer includes an oxide insulating material selected from silicon oxide, silicon oxynitride, aluminum oxide, hafnium oxide, gallium oxide, and a Ga—

Zn-based metal oxide.

8. The semiconductor device according to claim 1, further comprising a fourth insulating layer over the third insulating layer,

wherein the fourth insulating layer includes a nitride insulating material selected from silicon nitride oxide, silicon nitride, aluminum nitride, and aluminum nitride oxide.

9. The semiconductor device according to claim 1, further comprising a wiring electrically connected to the second oxide semiconductor layer,

wherein the wiring includes the same material as the gate electrode layer.

10. The semiconductor device according to claim 1, wherein the transparent conductive layer is electrically connected to one of the source electrode layer and the drain electrode layer.

11. A method for manufacturing a semiconductor device comprising a capacitor element, comprising the steps of:

forming a first insulating layer including nitrogen;

forming a gate electrode layer over the first insulating layer;

forming a second insulating layer over the gate electrode layer;

forming a first oxide semiconductor layer over the second insulating layer so as to overlap with the gate electrode layer;

forming a second oxide semiconductor layer over and in contact with the first insulating layer;

forming a source electrode layer and a drain electrode layer so as to be electrically connected to the first oxide semiconductor layer;

forming a third insulating layer over and in contact with the first oxide semiconductor layer and the second oxide semiconductor layer; and

forming a transparent conductive layer over the third insulating layer so as to overlap with the second oxide semiconductor layer,

wherein one of electrodes of the capacitor element is the second oxide semiconductor layer.

12. The method for manufacturing a semiconductor device, according to claim 11, wherein the other of the electrodes of the capacitor element is the transparent conductive layer.

13. The method for manufacturing a semiconductor device, according to claim 11, wherein the first oxide semiconductor layer and the second oxide semiconductor layer include the same material.

14. The method for manufacturing a semiconductor device, according to claim 11, wherein the first oxide semiconductor layer and the second oxide semiconductor layer have an energy gap of 2.0 eV or more.

15. The method for manufacturing a semiconductor device, according to claim 11, wherein the first insulating layer includes a nitride insulating material selected from silicon nitride oxide, silicon nitride, aluminum nitride, and aluminum nitride oxide.

16. The method for manufacturing a semiconductor device, according to claim 11, wherein the first insulating layer further includes hydrogen.

17. The method for manufacturing a semiconductor device, according to claim 11, wherein the third insulating layer includes an oxide insulating material selected from silicon oxide, silicon oxynitride, aluminum oxide, hafnium oxide, gallium oxide, and a Ga—

Zn-based metal oxide.

18. The method for manufacturing a semiconductor device, according to claim 11, further comprising the step of forming a fourth insulating layer over the third insulating layer,

wherein the fourth insulating layer includes a nitride insulating material selected from silicon nitride oxide, silicon nitride, aluminum nitride, and aluminum nitride oxide.

19. The method for manufacturing a semiconductor device, according to claim 11, further comprising the step of forming a wiring over the first insulating layer,

wherein the wiring is electrically connected to the second oxide semiconductor layer,

wherein the wiring includes the same material as the gate electrode layer.

20. The method for manufacturing a semiconductor device, according to claim 11, wherein the transparent conductive layer is electrically connected to one of the source electrode layer and the drain electrode layer.