MULTI-CHIP LED DIODE APPARATUS

• US 20140183566A1
• Filed: 08/05/2013
• Published: 07/03/2014
• Est. Priority Date: 05/13/2003
• Status: Active Grant

• Current Assignee: BX LED LLC (Ni, Wang & Massand, PLLC)
• Original Assignee: Bridgelux Incorporated
• Inventors: Liu, Heng
• Granted Patent: US 9,006,765 B2
• Time in Patent Office: Days
• US Class Current: 257/88
• CPC Class Codes: F21L 4/027 the light sources being a LED
• CPC Class Codes: F21Y 2115/10 Light-emitting diodes [LED]
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48137 the bodies being arranged next to each other, e.g. on a common substrate
• CPC Class Codes: H01L 25/0753 the devices being arranged next to each other
• CPC Class Codes: H01L 27/156 two-dimensional arrays
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/3025 Electromagnetic shielding
• CPC Class Codes: H01L 33/20 with a particular shape, e.g. curved or truncated substrate
• CPC Class Codes: H01L 33/24 of the light emitting region, e.g. non-planar junction
• CPC Class Codes: H01L 33/32 containing nitrogen
• CPC Class Codes: H01L 33/38 with a particular shape
• CPC Class Codes: H01L 33/46 Reflective coating, e.g. dielectric Bragg reflector
• CPC Class Codes: H01L 33/60 Reflective elements

Abstract

In one aspect, there is an apparatus that comprises a plurality of light emitting chips that each have active areas that have elongated aspect ratios. This chips are mounted in a generally rectangular package. The chips are each arranged around a periphery of the package so that each narrow side of each chip abuts either a sidewall forming the periphery of the package or a long side another of the chips. Some of the chips receive a biasing voltage through one or more other of the chips.

Claims

1. An apparatus, comprising:

a plurality of light emitting diode chips, each comprising a generally planar active area, wherein a ratio of a length of the active area to a width of the active area is at least 1.5;

1; and

a package having a recess defined by a bottom surface and four sidewalls in which pairs of sidewalls are generally co-parallel and intersect to define four corners of the recess, the plurality of diode chips disposed in the recess, and arranged around the periphery of the recess, with lengths of the diode chips co-parallel to the sidewalls, and each end of each of the diode chips disposed around the periphery of the recess either abuts one of the corners of the recess, or abuts an edge of another diode chip arranged around the periphery of the recess, and one or more of the plurality of light emitting diode chips are indirectly coupled to receive a biasing voltage from a pair of bonding wires respectively connected to different light emitting diode chips of the plurality.

2. The apparatus of claim 1, wherein the recesses are lined with reflective material.

3. The apparatus of claim 1, wherein the recesses are lined with reflective insulating material.

4. The apparatus of claim 1, wherein the generally planar active area comprises an upper epitaxial layer and a lower epitaxial layer.

5. The apparatus of claim 4, wherein the light emitting diode chips further comprise respective lower contact fingers disposed generally parallel to a longer side of the lower epitaxial layer.

6. The apparatus of claim 5, wherein each lower contact finger comprises a bond pad portion.

7. The apparatus of claim 1, wherein the ratio of a length of the active area to a width of the active area is at least 2:

1.

8. The apparatus of claim 1, wherein the ratio of a length of the active area to a width of the active area is between 2:

1 and 10;

1.

9. The apparatus of claim 4, wherein the lower epitaxial layer comprises an n-doped layer.

10. The apparatus of claim 4, wherein the upper epitaxial layer comprises a p-doped layer.

11. The apparatus of claim 4, further comprising an upper contact finger in electrical conductivity with the upper epitaxial layer, and which comprises a bond pad portion.

12. The apparatus of claim 1, wherein each light emitting diode chip comprises a separate substrate.

13. The apparatus of claim 12, wherein the substrate comprises a material selected from the group consisting of:

sapphire;

spinel;

glass;

ZnO;

SiC;

MgO;

GaN;

AlN; and

AlGaN.

14. The apparatus of claim 1, wherein the package further comprises a reflective protrusion disposed centrally in the recess and configured for reflecting light from the package.

15. The apparatus of claim 1, wherein each light emitting diode chip comprises an upper and lower epitaxial layer between which the active area is formed, and wherein a portion of the upper epitaxial layer is removed to expose the lower epitaxial layer, and a conductive finger is disposed on the lower epitaxial layer generally parallel to the length of the light emitting diode chip.