SWITCHING DEVICE WITH RESISTIVE DIVIDER

• US 20140197882A1
• Filed: 01/15/2013
• Published: 07/17/2014
• Est. Priority Date: 01/15/2013
• Status: Active Grant

• Current Assignee: Qorvo US, Inc. (Qorvo, Inc.)
• Original Assignee: TriQuint Semiconductor Incorporated (Qorvo, Inc.)
• Inventors: Furino, James P. Jr., Prabhakar, Ravishankar III
• Granted Patent: US 8,847,672 B2
• Time in Patent Office: Days
• US Class Current: 327/537
• CPC Class Codes: H01L 24/00 Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
• CPC Class Codes: H01L 27/0629 in combination with diodes, or resistors, or capacitors
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/13091 Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]

Abstract

Embodiments provide a switching device including one or more field-effect transistors (FETs). In embodiments, a resistive divider comprising a first resistor and a second resistor may be coupled with the FET at a position electrically between a gate terminal of the FET and a body terminal of the FET.

Claims

1. A circuit comprising:

a metal-oxide-semiconductor field-effect transistor (MOSFET) including a source terminal, a gate terminal, a drain terminal, and a body terminal;

a resistive divider having a first resistor and a second resistor and coupled with and between the gate terminal and the body terminal; and

a DC voltage source coupled with the gate terminal and the resistive divider, the DC voltage source configured to provide a constant DC voltage to the gate terminal and the resistive divider.

2. The circuit of claim 1, wherein the MOSFET is an n-type MOSFET.

3. The circuit of claim 1, wherein the MOSFET is a p-type MOSFET.

4. The circuit of claim 1, wherein the first resistor comprises a first connection coupled with a ground, and a second connection coupled with the body terminal.

5. The circuit of claim 4, wherein the second resistor comprises a first connection coupled with the body terminal and a second connection coupled with the gate terminal.

6. The circuit of claim 1, wherein the resistive divider is configured to bias a voltage of the body terminal between the DC voltage of the gate terminal and a ground voltage when the DC voltage of the gate terminal is not equal to the ground voltage.

7. The circuit of claim 6, wherein the voltage of the body terminal is a predetermined voltage based at least in part on a resistance of the first resistor and a resistance of the second resistor.

8. The circuit of claim 7, wherein the DC voltage of the gate terminal is positive with respect to the ground voltage.

9. The circuit of claim 7, wherein the DC voltage of the gate terminal is negative with respect to the ground voltage.

10. The circuit of claim 1, further comprising:

a switch including the MOSFET and the resistive divider; and

a radio frequency (RF) front end, an RF transmitter, or a power convertor including the switch.

11. A circuit comprising:

a DC power source configured to provide a constant DC voltage;

a ground source configured to provide a ground voltage; and

one or more unit cells coupled with the DC power source and the ground source, a unit cell of the one or more unit cells including;

a metal-oxide-semiconductor field-effect transistor (MOSFET) having a body terminal, a gate terminal coupled with the DC power source such that the DC power source is configured to provide the DC voltage to the gate terminal, a source terminal, and a drain terminal; and

a resistive divider coupled with the DC power source such that the DC power source is configured to provide the DC voltage to the resistive divider, the resistive divider comprising a first resistor and a second resistor and configured to bias a voltage of the body terminal between the DC voltage and the ground voltage when the DC voltage is not equal to the ground voltage.

12. The circuit of claim 11, wherein the MOSFET is a p-type MOSFET.

13. The circuit of claim 11, wherein the MOSFET is an n-type MOSFET.

14. The circuit of claim 11, wherein the first resistor comprises a first connection coupled with the ground source, and a second connection coupled with the body terminal.

15. The circuit of claim 11, wherein the second resistor comprises a first connection coupled with the body terminal and a second connection coupled with the gate terminal.

16. The circuit of claim 11, wherein the resistive divider is coupled with and between the gate terminal and the body terminal.

17. The circuit of claim 16, wherein the voltage of the body terminal is a predetermined voltage based at least in part on a resistance of the resistive divider.

18. The circuit of claim 17, wherein the DC voltage is positive with respect to the ground voltage.

19. The switch of claim 17, wherein the DC voltage is negative with respect to the ground voltage.

20. A method comprising:

coupling a metal-oxide-semiconductor field-effect transistor (MOSFET) with a DC power source and a ground source, the MOSFET comprising a drain terminal, a body terminal, a source terminal, and a gate terminal; and

coupling the body terminal and the gate terminal of the MOSFET with the resistive divider such that the resistive divider is positioned between the body terminal and the gate terminal;

wherein the resistance of the first resistor and the resistance of the second resistor are based at least in part on a desired voltage of the body terminal when the gate terminal is at a constant DC gate voltage provided by the DC power source, wherein the DC gate voltage is not equal to a ground voltage of the ground source.

21. The method of claim 20, wherein the MOSFET is an n-type MOSFET.

22. The method of claim 20, wherein the MOSFET is a p-type MOSFET.

23. The method of claim 20, further comprising coupling a first connection of the first resistor with the ground source, and coupling a second connection of the first resistor with the body terminal.

24. The method of claim 20, further comprising coupling a first terminal of the second resistor with the gate terminal, and coupling a second terminal of the second resistor with the body terminal.

25. The method of claim 20, wherein the desired voltage of the body terminal is between the DC gate voltage and the ground voltage.

26. The method of claim 25, wherein the DC gate voltage is positive with respect to the ground voltage.

27. The method of claim 25, wherein the DC gate voltage is negative with respect to the ground voltage.