RF Switch Gate Control

• US 20140253217A1
• Filed: 03/03/2014
• Published: 09/11/2014
• Est. Priority Date: 03/06/2013
• Status: Abandoned Application

• Current Assignee: Infineon Technologies Americas Corp. (Infineon Technologies AG)
• Original Assignee: International Rectifier Corporation (Infineon Technologies AG)
• Inventors: Briere, Michael A.
• Application Number:
  US14/195,511
• Publication Number:
  US 20140253217A1
• Time in Patent Office: Days
• US Class Current: 327/382
• CPC Class Codes: H03K 17/162 without feedback from the output circuit to the control circuit
• CPC Class Codes: H03K 17/693 Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors logic circuits H03K19/00; code converters H03M5/00, H03M7/00
• CPC Class Codes: H03K 2017/066 Maximizing the OFF-resistance instead of minimizing the ON-resistance
• CPC Class Codes: H03K 2217/0054 Gating switches, e.g. pass gates

Abstract

In one implementation, a switching circuit includes a pass switch including group III-V, for example III-Nitride, transistors coupled between an input of the switching circuit and an output of the switching circuit. The switching circuit further includes a shunt switch configured to ground the input of the switching circuit while the pass switch is disabled. The switching circuit also includes a gate control transistor configured to reduce resistance between a control terminal of the pass switch and/or the shunt switch and gate of the group III-V transistor of the pass switch and/or the shunt switch so as to enable and disable the pass switch and/or shunt switch. The gate control transistor can be coupled across a gate resistor of the pass switch and/or the shunt switch. The gate control transistor can reduce the resistance in order to lower the OFF state impedance of the pass switch and/or the shunt switch.

Claims

1. An RF switch comprising:

at least one transistor;

a gate resistor and a gate control transistor;

wherein said gate control transistor is parallel connected across said gate resistor;

and wherein said gate control transistor is configured to reduce resistance between a control terminal of said RF switch and a gate of said at least one transistor when said at least one transistor is in an OFF state.

2. The RF switch of claim 1, wherein said gate resistor has a resistance greater than approximately 20 kilo-ohms

3. The RF switch of claim 1, wherein said gate control transistor reduces said resistance to improve isolation of said RF switch.

4. The RF switch of claim 1, wherein said at least one transistor is a group III-V High Electron Mobility Transistor (HEMT).

5. The RF switch of claim 1, wherein said at least one transistor is a depletion mode transistor.

6. The RF switch of claim 1, wherein said at least one transistor is selected from the group consisting of a CMOS transistor and a LDMOS transistor.

7. The RF switch of claim 1, wherein said gate control transistor is a P channel transistor.

8. The RF switch of claim 1 wherein said at least one transistor comprises two or more series connected transistors.

9. The RF switch of claim 5, wherein said gate control transistor has a threshold voltage that is approximately equal to a pinch-off voltage of said depletion mode transistor.

10. The RF switch of claim 1, wherein said gate control transistor and said gate resistor are monolithically integrated.

11. The RF switch of claim 1, wherein one or more of said at least one transistors and either said gate control transistor and/or said gate resistor are monolithically integrated.

12. A switching circuit comprising:

a pass switch comprising at least one transistor coupled between an input of said switching circuit and an output of said switching circuit;

a shunt switch configured to ground said input of said switching circuit when said pass switch is disabled;

a gate control transistor configured to reduce resistance between a control terminal of said pass switch and gate of said at least one transistor of said pass switch so as to improve isolation of said pass switch.

13. The switching circuit of claim 12, wherein said gate control transistor is coupled across a gate resistor of said pass switch.

14. The switching circuit of claim 13, wherein said gate resistor has a resistance greater than approximately 20 kilo-ohms.

15. The switching circuit of claim 12, wherein said gate control transistor reduces said resistance to improve isolation of said switching circuit.

16. The switching circuit of claim 12, wherein said gate control transistor is a group IV transistor.

17. The switching circuit of claim 12, wherein said shunt switch comprises at least one group III-V transistor.

18. The switching circuit of claim 12, further comprising another gate control transistor configured to reduce resistance between a control terminal of said shunt switch and gate of at least one transistor of said shunt switch so as to improve isolation of said shunt switch.

19. The switching circuit of claim 12, wherein said gate control transistor is a P channel transistor.

20. The switching circuit of claim 12, wherein said at least one transistor of said pass switch is a group transistor.

21. The switching circuit of claim 20, wherein said gate control transistor has a threshold voltage that is approximately equal to a pinch-off voltage of said group III-V transistor.

22. The switching circuit of claim 12, wherein said at least one transistor of said pass switch is selected from the group consisting of a CMOS transistor and a LDMOS transistor.