HIGH DYNAMIC RANGE IMAGE SENSOR SYSTEM AND METHOD THEREOF
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Abstract
A high dynamic range imager system is provided that includes an imager having a pixel array, and memory in communication with the pixel array, the memory comprising a plurality of memory cells, wherein the number of memory cells is approximately the number of whole row-times of exposures between the first conditional reset and row readout.
10 Citations
26 Claims
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1-6. -6. (canceled)
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7. A high dynamic range imager system comprising:
an imager comprising; a pixel array disposed on a die comprising a plurality of pixel rows; a memory disposed on the die and in communication with the pixel array, the memory comprising a plurality of memory cells configured to store data representative of a selected conditional reset, wherein the number of memory cells corresponds to a number of pixels in the plurality of pixel rows from a first conditional reset to a row readout of each pixel row. - View Dependent Claims (8, 9, 10, 11, 12, 13)
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14. An imager die for storing integration period selection data for a high dynamic range image sensor comprising:
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a pixel array comprising a plurality of pixel rows; an imager memory in communication with the pixel array, the imager memory comprising a plurality of memory cells; a memory manager in communication with the pixel array and the imager memory, the memory manager configured to control an allocation of the data from the pixel array in the plurality of memory cells; and wherein the number of memory cells corresponds to the number of pixels in the plurality of pixel rows from a first conditional reset of a first row of the plurality of pixel rows to a row readout of a second row of the plurality of pixel rows. - View Dependent Claims (15, 16, 17, 18, 19)
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20. A high dynamic range imager comprising:
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a pixel array comprising a plurality of pixel rows; a memory disposed on an imager die in communication with the pixel array and configured for storing data representative of an integration period index in a plurality of memory rows comprising memory cells; a memory manager in communication with the pixel array and the memory, the memory manager configured to control a dynamic allocation of the data from each of the plurality of pixels rows in the plurality of memory rows; and wherein the number of pixel rows is greater than the number of the plurality of memory rows. - View Dependent Claims (21, 22, 23, 24, 25, 26)
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Specification