MULTI-LEVEL INVERTER

• US 20140268965A1
• Filed: 03/14/2013
• Published: 09/18/2014
• Est. Priority Date: 03/14/2013
• Status: Active Grant

• Current Assignee: Solaredge Technologies Incorporated
• Original Assignee: Solaredge Technologies Incorporated
• Inventors: Yoskovich, Ilan
• Granted Patent: US 9,941,813 B2
• Time in Patent Office: Days
• US Class Current: 363/131
• CPC Class Codes: H02M 1/0043 Converters switched with a phase shift, i.e. interleaved non-isolated DC/DC converters H02M3/1586
• CPC Class Codes: H02M 1/088 for the simultaneous control of series or parallel connected semiconductor devices
• CPC Class Codes: H02M 7/42 Conversion of dc power input into ac power output without possibility of reversal
• CPC Class Codes: H02M 7/483 Converters with outputs that each can have more than two voltages levels
• CPC Class Codes: H02M 7/4837 Flying capacitor converters
• CPC Class Codes: H02M 7/487 Neutral point clamped inverters
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

A multi-level inverter having at least two banks, each bank containing a plurality of low voltage MOSFET transistors. A processor configured to switch the plurality of low voltage MOSFET transistors in each bank to switch at multiple times during each cycle.

Claims

1. A method comprising switching at different times each of a plurality of low voltage MOSFET transistors in a single bank of a multi-level inverter.

2. The method of claim 1 wherein the switching of the single bank includes switching at different times more than three low voltage MOSFET transistors.

3. The method of claim 1 wherein the turning on of any one low voltage MOSFET transistor in the bank is time spaced from the turning on of another low voltage MOSFET transistor in the bank.

4. The method of claim 1 wherein the switching occurs at a cycle time of about 200 kHz.

5. An apparatus comprising a multi-level inverter having at least two banks, wherein each bank comprises a plurality of low voltage MOSFET transistors;

and a controller for controlling the low voltage MOSFET transistors in each bank to switch at a multiple times during each cycle.