SEMICONDUCTOR DEVICE

• US 20140339548A1
• Filed: 05/16/2014
• Published: 11/20/2014
• Est. Priority Date: 05/20/2013
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: YAMAZAKI, Shunpei, Suzawa, Hideomi, Okazaki, Yutaka
• Granted Patent: US 9,343,579 B2
• Time in Patent Office: Days
• US Class Current: 257/43
• CPC Class Codes: H01L 29/42384 for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H01L 29/517 the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate H01L29/518 takes precedence
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/785 having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 29/78603 characterised by the insulating substrate or support H01L29/78657 takes precedence
• CPC Class Codes: H01L 29/78606 with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device H01L29/78642, H01L29/78645 take precedence
• CPC Class Codes: H01L 29/78648 arranged on opposing sides of the channel
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621
• CPC Class Codes: H10B 99/00 Subject matter not provided for in other groups of this subclass

Abstract

To provide a semiconductor device that includes an oxide semiconductor and is miniaturized while keeping good electrical properties. In the semiconductor device, an oxide semiconductor layer filling a groove is surrounded by insulating layers including an aluminum oxide film containing excess oxygen. Excess oxygen contained in the aluminum oxide film is supplied to the oxide semiconductor layer, in which a channel is formed, by heat treatment in a manufacturing process of the semiconductor device. Moreover, the aluminum oxide film forms a barrier against oxygen and hydrogen, which inhibits the removal of oxygen from the oxide semiconductor layer surrounded by the insulating layers including an aluminum oxide film and the entry of impurities such as hydrogen in the oxide semiconductor layer. Thus, a highly purified intrinsic oxide semiconductor layer can be obtained. The threshold voltage is controlled effectively by gate electrode layers formed over and under the oxide semiconductor layer.

Claims

1. A semiconductor device comprising:

a first insulating layer including a groove;

a gate electrode layer at least in a bottom of the groove;

a gate insulating layer over and in contact with the gate electrode layer to cover the groove and at least part of a top of the first insulating layer;

an oxide semiconductor layer overlapping with the gate electrode layer with the gate insulating layer interposed therebetween;

a source electrode layer and a drain electrode layer over the first insulating layer with the gate insulating layer interposed therebetween, the source electrode layer and the drain electrode layer electrically connected to the oxide semiconductor layer; and

a second insulating layer over the gate insulating layer to cover the source electrode layer and the drain electrode layer,

wherein each of the gate insulating layer and the second insulating layer includes an aluminum oxide film containing excess oxygen.

2. The semiconductor device according to claim 1, wherein the gate insulating layer covers a side and a bottom of the oxide semiconductor layer in the groove.

3. The semiconductor device according to claim 1, wherein the gate insulating layer and the second insulating layer are in contact with each other in a region where the source electrode layer and the drain electrode layer do not exist.

4. The semiconductor device according to claim 1, further comprising:

a first oxide layer between the gate insulating layer and the oxide semiconductor layer; and

a second oxide layer between the oxide semiconductor layer and the second insulating layer,

wherein each of the first oxide layer and the second oxide layer comprises one of metal elements contained in the oxide semiconductor layer.

5. The semiconductor device according to claim 4, wherein the second oxide layer is over the source electrode layer and the drain electrode layer to cover the oxide semiconductor layer not covered with the source electrode layer and the drain electrode layer.

6. The semiconductor device according to claim 1, wherein the aluminum oxide film containing excess oxygen is an AlO_x film (x>

1.5).

7. A semiconductor device comprising:

a first insulating layer including a groove;

a gate electrode layer in contact with a side and a bottom of the groove;

a gate insulating layer over and in contact with the gate electrode layer to cover the groove and at least part of a top of the first insulating layer;

an oxide semiconductor layer overlapping with the gate electrode layer with the gate insulating layer interposed therebetween;

a source electrode layer and a drain electrode layer over the first insulating layer with the gate insulating layer interposed therebetween, the source electrode layer and the drain electrode layer electrically connected to the oxide semiconductor layer; and

a second insulating layer over the gate insulating layer to cover the source electrode layer and the drain electrode layer,

wherein each of the gate insulating layer and the second insulating layer includes an aluminum oxide film containing excess oxygen.

8. The semiconductor device according to claim 7, wherein the gate insulating layer covers a side and a bottom of the oxide semiconductor layer in the groove.

9. The semiconductor device according to claim 7, wherein the gate insulating layer and the second insulating layer are in contact with each other in a region where the source electrode layer and the drain electrode layer do not exist.

10. The semiconductor device according to claim 7, further comprising:

a first oxide layer between the gate insulating layer and the oxide semiconductor layer; and

a second oxide layer between the oxide semiconductor layer and the second insulating layer,

wherein each of the first oxide layer and the second oxide layer comprises one of metal elements contained in the oxide semiconductor layer.

11. The semiconductor device according to claim 10, wherein the second oxide layer is over the source electrode layer and the drain electrode layer to cover the oxide semiconductor layer not covered with the source electrode layer and the drain electrode layer.

12. The semiconductor device according to claim 7, wherein the aluminum oxide film containing excess oxygen is an AlO_x film (x>

1.5).

13. A semiconductor device comprising:

a first insulating layer including a groove;

a first gate electrode layer at least in a bottom of the groove;

a first gate insulating layer over and in contact with the first gate electrode layer to cover the groove and at least part of a top of the first insulating layer;

an oxide semiconductor layer overlapping with the first gate electrode layer with the first gate insulating layer interposed therebetween;

a source electrode layer and a drain electrode layer over the first insulating layer with the first gate insulating layer interposed therebetween, the source electrode layer and the drain electrode layer electrically connected to the oxide semiconductor layer;

a second gate insulating layer in contact with the source electrode layer, the drain electrode layer, and the oxide semiconductor layer;

a second gate electrode layer overlapping with the oxide semiconductor layer with the second gate insulating layer interposed therebetween; and

a second insulating layer covering the source electrode layer, the drain electrode layer, and the second gate electrode layer,

wherein each of the first gate insulating layer and the second insulating layer includes an aluminum oxide film containing excess oxygen.

14. The semiconductor device according to claim 13, wherein the first gate insulating layer covers a side and a bottom of the oxide semiconductor layer in the groove.

15. The semiconductor device according to claim 13, wherein the first gate insulating layer and the second insulating layer are in contact with each other in a region where the source electrode layer and the drain electrode layer do not exist.

16. The semiconductor device according to claim 13, further comprising:

a first oxide layer between the first gate insulating layer and the oxide semiconductor layer; and

a second oxide layer between the oxide semiconductor layer and the second gate insulating layer,

wherein each of the first oxide layer and the second oxide layer comprises one of metal elements contained in the oxide semiconductor layer.

17. The semiconductor device according to claim 16, wherein the second oxide layer is over the source electrode layer and the drain electrode layer to cover the oxide semiconductor layer not covered with the source electrode layer and the drain electrode layer.

18. The semiconductor device according to claim 13, wherein the aluminum oxide film containing excess oxygen is an AlO_x film (x>

1.5).

19. A semiconductor device comprising:

a first insulating layer including a groove;

a first gate electrode layer in contact with a side and a bottom of the groove;

a first gate insulating layer over and in contact with the first gate electrode layer to cover the groove and at least part of a top of the first insulating layer;

an oxide semiconductor layer overlapping with the first gate electrode layer with the first gate insulating layer interposed therebetween;

a source electrode layer and a drain electrode layer over the first insulating layer with the first gate insulating layer interposed therebetween, the source electrode layer and the drain electrode layer electrically connected to the oxide semiconductor layer;

a second gate insulating layer in contact with the source electrode layer, the drain electrode layer, and the oxide semiconductor layer;

a second gate electrode layer overlapping with the oxide semiconductor layer with the second gate insulating layer interposed therebetween; and

a second insulating layer covering the source electrode layer, the drain electrode layer, and the second gate electrode layer,

wherein each of the first gate insulating layer and the second insulating layer includes an aluminum oxide film containing excess oxygen.

20. The semiconductor device according to claim 19, wherein the first gate insulating layer covers a side and a bottom of the oxide semiconductor layer in the groove.

21. The semiconductor device according to claim 19, wherein the first gate insulating layer and the second insulating layer are in contact with each other in a region where the source electrode layer and the drain electrode layer do not exist.

22. The semiconductor device according to claim 19, further comprising:

a first oxide layer between the first gate insulating layer and the oxide semiconductor layer; and

a second oxide layer between the oxide semiconductor layer and the second gate insulating layer,

wherein each of the first oxide layer and the second oxide layer comprises one of metal elements contained in the oxide semiconductor layer.

23. The semiconductor device according to claim 22, wherein the second oxide layer is over the source electrode layer and the drain electrode layer to cover the oxide semiconductor layer not covered with the source electrode layer and the drain electrode layer.

24. The semiconductor device according to claim 19, wherein the aluminum oxide film containing excess oxygen is an AlO_x film (x>

1.5).