Methods and Systems for Detecting Repeating Defects on Semiconductor Wafers Using Design Data

• US 20150012900A1
• Filed: 07/01/2014
• Published: 01/08/2015
• Est. Priority Date: 07/08/2013
• Status: Active Grant

• Current Assignee: KLA-Tencor Corporation
• Original Assignee: KLA-Tencor Corporation
• Inventors: Shifrin, Eugene, Kulkarni, Ashok, Bhaskar, Kris, Lynch, Graham Michael, Jordan, John Raymond III, Fang, Chwen-Jiann
• Granted Patent: US 9,355,208 B2
• Time in Patent Office: Days
• US Class Current: 716/112
• CPC Class Codes: G01N 21/9501 Semiconductor wafers manufacturing processes per se of semiconductor devices implementing a measuring step H01L22/10
• CPC Class Codes: G06F 30/30 Circuit design
• CPC Class Codes: G06F 30/398 Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM] optical proximity correction [OPC] design processes G03F1/36
• CPC Class Codes: H01L 22/12 for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions electrical measurement of diffusions H01L22/14

Abstract

Systems and methods for detecting defects on a wafer are provided. One method includes determining locations of all instances of a weak geometry in a design for a wafer. The locations include random, aperiodic locations. The weak geometry includes one or more features that are more prone to defects than other features in the design. The method also includes scanning the wafer with a wafer inspection system to thereby generate output for the wafer with one or more detectors of the wafer inspection system. In addition, the method includes detecting detects in at least one instance of the weak geometry based on the output generated at two or more instances of the weak geometry in a single die on the wafer.

Claims

1. A method for detecting defects on a wafer, comprising:

determining locations of all instances of a weak geometry in a design for a wafer, wherein the locations comprise random, aperiodic locations, and wherein the weak geometry comprises one or more features that are more prone to defects than other features in the design;

scanning the wafer with a wafer inspection system to thereby generate output for the wafer with one or more detectors of the wafer inspection system; and

detecting defects in at least one instance of the weak geometry based on the output generated at two or more instances of the weak geometry in a single die on the wafer, wherein said determining and said detecting are performed with one or more computer systems.

2. The method of claim 1, wherein the weak geometry is specified in a window at a point in design coordinate space, and wherein a width and a height of the window are less than or equal to 100 nm.

3. The method of claim 2, wherein instances of the window in the design constitute at least some micro care areas for inspection of the wafer.

4. The method of claim 2, further comprising creating a larger window around the window, wherein features in the larger window are used as a pattern of interest for inspection of the wafer.

5. The method of claim 4, wherein detecting the defects comprises aligning the features in the larger window to patch images in the output.

6. The method of claim 4, further comprising determining design context for the weak geometry based on the features in the larger window.

7. The method of claim 4, further comprising grouping all instances of the pattern of interest that are substantially the same into one bin and all other instances of patterns of interest into one or more other bins.

8. The method of claim 4, further comprising generating a standard reference patch image for the pattern of interest by acquiring an image of at least one instance of the pattern of interest with the wafer inspection system.

9. The method of claim 4, further comprising generating a standard reference patch image for the pattern of interest from multiple image patches acquired by the wafer inspection system corresponding to different locations in a die where the pattern of interest exists.

10. The method of claim 9, wherein generating the standard reference patch image from the multiple image patches comprises aligning the multiple image patches to each other with sub-pixel accuracy and processing the aligned multiple image patches together.

11. The method of claim 4, wherein scanning the wafer and detecting the defects are performed with a wafer inspection recipe, and wherein the method further comprises storing a standard reference patch image for the pattern of interest and any other patterns of interest different than the pattern of interest in the wafer inspection recipe.

12. The method of claim 4, wherein detecting the defects comprises aligning a standard reference patch image for the pattern of interest to the output generated by the wafer inspection system to determine the output corresponding to the pattern of interest and applying one or more defect detection algorithms to only a portion of the output corresponding to the pattern of interest, and wherein the portion of the output corresponds to only the weak geometry in the pattern of interest.

13. The method of claim 4, further comprising generating a standard reference patch image for the pattern of interest and a standard defect image for the weak geometry in the pattern of interest.

14. The method of claim 13, wherein the standard defect image is acquired by scanning an additional wafer of the same design and layer as the wafer with the wafer inspection system and the same imaging conditions used for scanning the wafer.

15. The method of claim 13, wherein detecting the defects comprises comparing the output generated for one instance of the weak geometry with the standard reference patch image and comparing the output generated for the one instance of the weak geometry with the standard defect image.

16. The method of claim 15, wherein detecting the defects further comprises determining that a potential defect is located in the one instance of the weak geometry if the output generated for the one instance of the weak geometry and the standard reference patch image are different and if the output generated for the one instance of the weak geometry and the standard defect image are substantially the same.

17. The method of claim 1, wherein detecting the defects comprises determining aggregated properties for the output generated at said all instances of the weak geometry and determining if the at least one instance of the weak geometry includes a defect based on the aggregated properties.

18. The method of claim 1, wherein detecting the defects comprises determining aggregated properties for the output generated in instances of the weak geometry in only a portion of a die and determining if the at least one instance of the weak geometry includes a defect based on the aggregated properties.

19. A non-transitory computer-readable medium, storing program instructions executable on a computer system for performing a computer-implemented method for detecting defects on a wafer, wherein the computer-implemented method comprises:

determining locations of all instances of a weak geometry in a design for a wafer, wherein the locations comprise random, aperiodic locations, and wherein the weak geometry comprises one or more features that are more prone to defects than other features in the design;

scanning the wafer with a wafer inspection system to thereby generate output for the wafer with one or more detectors of the wafer inspection system; and

detecting defects in at least one instance of the weak geometry based on the output generated at two or more instances of the weak geometry in a single die on the wafer.

20. A system configured to detect defects on a wafer, comprising:

an inspection subsystem configured to scan a wafer to thereby generate output for the wafer with one or more detectors of the inspection subsystem; and

one or more computer subsystems configured for;

determining locations of all instances of a weak geometry in a design for the wafer, wherein the locations comprise random, aperiodic locations, and wherein the weak geometry comprises one or more features that are more prone to defects than other features in the design; and

detecting defects in at least one instance of the weak geometry based on the output generated at two or more instances of the weak geometry in a single die on the wafer.