MILLIMETER WAVE WAFER LEVEL CHIP SCALE PACKAGING (WLCSP) DEVICE
First Claim
1. A wafer level chip scale package (WLCSP) structure comprising:
- a printed circuit board (PCB) trace connection including at least one ground connection connected with a PCB ground plane;
a set of ground pillars each contacting the printed circuit board trace connection;
a set of chip pads contacting each of the ground pillars in the set of ground pillars;
a chip ground plane connecting the set of chip pads; and
a signal interconnect interposed between two of the set of ground pillars, the signal interconnect including;
a signal trace connection electrically isolated from the PCB ground plane;
a signal pillar contacting the signal trace connection;
a chip pad contacting the signal pillar; and
a signal trace connection on a chip contacting the chip pad.
3 Assignments
0 Petitions
Accused Products
Abstract
Various embodiments include wafer level chip scale package (WLCSP) structures and methods of tuning such structures. In some embodiments, the WLCSP structure includes: a printed circuit board (PCB) trace connection including at least one PCB ground connection connected with a PCB ground plane; a set of ground solder balls each contacting the printed circuit board trace connection; a set of chip pads contacting each of the ground solder balls in the set of ground solder balls; a chip ground plane connecting the set of chip pads; and a signal interconnect interposed between two of the set of ground solder balls, the signal interconnect including: a signal trace connection electrically isolated from the PCB ground plane; a signal ball contacting the signal PCB trace connection; a chip pad contacting the signal ball, and a signal trace connection on a chip contacting the chip pad.
10 Citations
8 Claims
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1. A wafer level chip scale package (WLCSP) structure comprising:
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a printed circuit board (PCB) trace connection including at least one ground connection connected with a PCB ground plane; a set of ground pillars each contacting the printed circuit board trace connection; a set of chip pads contacting each of the ground pillars in the set of ground pillars; a chip ground plane connecting the set of chip pads; and a signal interconnect interposed between two of the set of ground pillars, the signal interconnect including; a signal trace connection electrically isolated from the PCB ground plane; a signal pillar contacting the signal trace connection; a chip pad contacting the signal pillar; and a signal trace connection on a chip contacting the chip pad. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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Specification