SHARING LOCAL CACHE FROM A FAILOVER NODE

• US 20150039834A1
• Filed: 08/01/2013
• Published: 02/05/2015
• Est. Priority Date: 08/01/2013
• Status: Active Grant

• Current Assignee: Lenovo International Limited (Lenovo Group Ltd.)
• Original Assignee: International Business Machines Corporation
• Inventors: CUDAK, GARY D., DO, LYDIA M., HARDEE, CHRISTOPHER J., ROBERTS, ADAM
• Granted Patent: US 9,454,485 B2
• Time in Patent Office: Days
• US Class Current: 711/130
• CPC Class Codes: G06F 11/2025 using centralised failover control functionality
• CPC Class Codes: G06F 11/2038 with a single idle spare processing component
• CPC Class Codes: G06F 11/2043 where the redundant components share a common memory address space
• CPC Class Codes: G06F 11/2046 where the redundant components share persistent storage G06F11/2043 takes precedence
• CPC Class Codes: G06F 11/2097 maintaining the standby controller/processing unit updated initialisation or re-synchronisation thereof G06F11/1658 and subgroups
• CPC Class Codes: G06F 12/084 with a shared cache
• CPC Class Codes: G06F 12/0871 Allocation or management of cache space
• CPC Class Codes: G06F 12/12 Replacement control
• CPC Class Codes: G06F 2212/1032 Reliability improvement, data loss prevention, degraded operation etc
• CPC Class Codes: G06F 2212/286 Mirrored cache memory
• CPC Class Codes: G06F 2212/311 In host system

Abstract

Sharing local cache from a failover node, including: determining, by a managing compute node, whether a first compute node and a second compute node each have a local cache, where the second compute node is a mirrored copy of the first compute node; responsive to determining that the first compute node and the second compute node each have a local cache, combining, by the managing compute node, local cache on the first compute node and local cache on the second compute node into unified logical cache; receiving, by the managing compute node, a memory access request; and sending, by the managing compute node, the memory access request to an appropriate local cache in the unified logical cache.

Claims

1-6. -6. (canceled)

7. An apparatus for sharing local cache from a failover node, the apparatus comprising a computer processor, a computer memory operatively coupled to the computer processor, the computer memory having disposed within it computer program instructions that, when executed by the computer processor, cause the apparatus to carry out the steps of:

determining, by a managing compute node, whether a first compute node and a second compute node each have a local cache, wherein the second compute node is a mirrored copy of the first compute node;

responsive to determining that the first compute node and the second compute node each have a local cache, combining, by the managing compute node, local cache on the first compute node and local cache on the second compute node into unified logical cache;

receiving, by the managing compute node, a memory access request; and

sending, by the managing compute node, the memory access request to an appropriate local cache in the unified logical cache.

8. The apparatus of claim 7 wherein sending the memory access request to an appropriate local cache in the unified logical cache further comprises:

determining whether the memory access request can be serviced by the local cache in the first compute node;

responsive to determining that the memory access request cannot be serviced by the local cache in the first compute node, determining whether the memory access request can be serviced by the local cache in the second compute node; and

responsive to determining that the memory access request can be serviced by the local cache in the second compute node, sending the memory access request to the second compute node.

9. The apparatus of claim 7 wherein sending the memory access request to an appropriate local cache in the unified logical cache further comprises sending the memory access request to each compute node.

10. The apparatus of claim 7 further comprising computer program instructions that, when executed by the computer processor, cause the apparatus to carry out the steps of:

determining whether the memory access request can be serviced by the unified logical cache; and

responsive to determining that the memory access request cannot be serviced by the unified logical cache;

servicing the memory access request using non-cache memory on the first compute node, including reading data stored at a location in non-cache memory specified in the memory access request; and

writing the data to a location in the unified logical cache in dependence upon a predetermined cache replacement policy.

11. The apparatus of claim 10 wherein writing the data to a location in the unified logical cache in dependence upon a predetermined cache replacement policy further comprises selecting one of the local caches for receiving the data.

12. The apparatus of claim 7 wherein the memory access request includes a memory address specifying a location in memory to read data from.

13. A computer program product for sharing local cache from a failover node, the computer program product disposed upon a computer readable medium, the computer program product comprising computer program instructions that, when executed, cause a computer to carry out the steps of:

determining, by a managing compute node, whether a first compute node and a second compute node each have a local cache, wherein the second compute node is a mirrored copy of the first compute node;

responsive to determining that the first compute node and the second compute node each have a local cache, combining, by the managing compute node, local cache on the first compute node and local cache on the second compute node into unified logical cache;

receiving, by the managing compute node, a memory access request; and

sending, by the managing compute node, the memory access request to an appropriate local cache in the unified logical cache.

14. The computer program product of claim 13 wherein sending the memory access request to an appropriate local cache in the unified logical cache further comprises:

determining whether the memory access request can be serviced by the local cache in the first compute node;

responsive to determining that the memory access request cannot be serviced by the local cache in the first compute node, determining whether the memory access request can be serviced by the local cache in the second compute node; and

responsive to determining that the memory access request can be serviced by the local cache in the second compute node, sending the memory access request to the second compute node.

15. The computer program product of claim 13 wherein sending the memory access request to an appropriate local cache in the unified logical cache further comprises sending the memory access request to each compute node.

16. The computer program product of claim 13 further comprising computer program instructions that, when executed, cause the computer to carry out the steps of:

determining whether the memory access request can be serviced by the unified logical cache; and

responsive to determining that the memory access request cannot be serviced by the unified logical cache;

servicing the memory access request using non-cache memory on the first compute node, including reading data stored at a location in non-cache memory specified in the memory access request; and

writing the data to a location in the unified logical cache in dependence upon a predetermined cache replacement policy.

17. The computer program product of claim 16 wherein writing the data to a location in the unified logical cache in dependence upon a predetermined cache replacement policy further comprises selecting one of the local caches for receiving the data.

18. The computer program product of claim 13 wherein the memory access request includes a memory address specifying a location in memory to read data from.

19. The computer program product of claim 13 wherein the computer readable medium comprises a signal medium.

20. The computer program product of claim 13 wherein the computer readable medium comprises a storage medium.