ATOMIC TRANSACTIONS TO NON-VOLATILE MEMORY

• US 20150095600A1
• Filed: 09/27/2013
• Published: 04/02/2015
• Est. Priority Date: 09/27/2013
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Bahnsen, Robert, Sakthivelu, Sridharan, Saletore, Vikram A., Govindaraju, Kanivenahalli, Zimmer, Vincent J., Viswanathan, Krishnaswamy, Tolentino, Matthew E.
• Granted Patent: US 9,524,219 B2
• Time in Patent Office: Days
• US Class Current: 711/163
• CPC Class Codes: G06F 11/1474 in transactions G06F16/20 takes precedence
• CPC Class Codes: G06F 12/1441 for a range
• CPC Class Codes: G06F 9/466 Transaction processing

Abstract

Durable atomic transactions for non-volatile media are described. A processor includes an interface to a non-volatile storage medium and a functional unit to perform instructions associated with an atomic transaction. The instructions are to update data at a set of addresses in the non-volatile storage medium atomically. The functional unit is operable to perform a first instruction to create the atomic transaction that declares a size of the data to be updated atomically. The functional unit is also operable to perform a second instruction to start execution of the atomic transaction. The functional unit is further operable to perform a third instruction to commit the atomic transaction to the set of addresses in the non-volatile storage medium, wherein the updated data is not visible to other functional units of the processing device until the atomic transaction is complete.

Claims

1. A processing device comprising:

an interface to a non-volatile storage medium; and

a first functional unit to perform a plurality of instructions associated with an atomic transaction, wherein the plurality of instructions are to update data at a set of addresses in the non-volatile storage medium atomically, wherein the first functional unit is operable to;

perform a first instruction to create the atomic transaction that declares a size of the data to be updated atomically,

perform a second instruction to start execution of the atomic transaction; and

perform a third instruction to commit the atomic transaction to the set of addresses in the non-volatile storage medium, wherein the updated data is not visible to other functional units of the processing device until the atomic transaction is complete.

2. The processing device of claim 1, wherein during performance of the first instruction, the first functional unit is further operable to change a state of the set of addresses to an invalid state after creating the atomic transaction.

3. The processing device of claim 2, wherein before performance of the second instruction, the first functional unit is further operable to perform a fourth instruction to register the set of addresses to be modified during the atomic transaction in a transaction tracker.

4. The processing device of claim 2, wherein before performance of the second instruction, the first functional unit is further operable to:

change a state of the set of addresses to a locked state, and

change the state of the set of addresses from the locked state to a processing state when the states of each of the set of addresses are in the locked state to start execution of the atomic transaction.

5. The processing device of claim 1, wherein during performance of the third instruction, the first functional unit is further operable to write the data for the set of addresses to an intermediate memory location before committing the data for the set of addresses to the non-volatile storage medium, and

wherein the first functional unit is to lock the set of addresses after writing the data for the set of addresses to the intermediate memory location and before committing the data for the set of addresses to the non-volatile storage medium.

6. The processing device of claim 5, wherein during performance of the third instruction, the first functional unit is further operable to change a state of the set of addresses to a visible state to unlock the set of addresses after the atomic transaction has been committed to the set of addresses in the non-volatile storage medium.

7. The processing device of claim 5, wherein the intermediate memory location is a memory element in a cache, wherein during performance of the third instruction, the functional unit is further to:

write the data from the cache to a buffer of the non-volatile storage medium while the set of addresses are in a locked state; and

unlock the set of addresses when the data is written from the cache to the buffer of the non-volatile storage medium.

8. The processing device of claim 7, wherein the cache is operable to store two sets of data for a respective one of the set of address of the non-volatile storage medium.

9. The processing device of claim 8, wherein a first set of the two sets of data is associated with the atomic transaction, wherein a second set of the two sets of data contains data that existed before the functional unit created the atomic transaction.

10. The processing device of claim 9 further comprising a second functional unit that is operable to execute a thread, wherein the second set of data is returned to the second functional unit when the thread requests to access one of the set of addresses associated with the atomic transaction.

11. The processing device of claim 1, wherein writing the data for the set of addresses to the non-volatile storage medium of the third instruction comprises writing the data to a buffer of the non-volatile storage medium.

12. The processing device of claim 11, wherein the first functional unit is further operable to write the data from the buffer of the non-volatile storage medium to a set of addresses of the non-volatile storage medium.

13. The processing device of claim 1, wherein the first functional unit is further to track the atomic transaction using a transaction identifier (TID).

14. The processing device of claim 13, wherein the first functional unit is further operable to invalidate the TID after the atomic transaction has been committed.

15. The processing device of claim 1, wherein the non-volatile storage medium is byte-addressable.

16. A method comprising:

creating, by a first functional unit of a processing device, an atomic transaction that declares a size of data to be updated atomically, wherein execution of the atomic transaction comprises a plurality of instructions to update the data at a set of addresses in a non-volatile storage medium;

performing the atomic transaction;

committing the atomic transaction to the set of addresses in the non-volatile storage medium, wherein the updated data is not visible to other functional units of the processing device until the atomic transaction is complete.

17. The method of claim 16 further comprising unlocking the set of addresses after committing the atomic transaction to the set of addresses in the non-volatile storage medium.

18. The method of claim 16 further comprising registering the atomic transaction to indicate that the set of addresses is to be modified during execution of the atomic transaction.

19. The method of claim 16 further comprising:

writing the data associated with the set of addresses in an intermediate memory location before committing the atomic transaction to the set of addresses in the non-volatile storage medium, and

wherein committing the atomic transaction to the set of addresses in the non-volatile storage medium comprises writing the data associated with the set of addresses from the intermediate memory location to the non-volatile storage medium.

20. The method of claim 19, wherein the intermediate memory location is a memory element in a buffer of the non-volatile storage medium.

21. The method of claim 19, wherein the intermediate memory location is a memory element in a cache, the method further comprising:

writing the data from the cache to a memory element in a buffer of the non-volatile storage medium while the set of addresses are locked; and

unlocking the set of addresses when the data is written from the cache to the buffer of the non-volatile storage medium.

22. The method of claim 16, wherein writing to the set of addresses comprises updating old data with new data, the method of claim further comprising:

before the set of addresses is unlocked, providing, by the processing device, the old data to a second functional unit that is not associated with the atomic transaction.

23. The method of claim 22 further comprising:

accessing, by a second functional unit, at least one of the set of addresses while the atomic transaction is being executed; and

receiving, by the second functional unit, the old data.

24. The method of claim 23, wherein the old data is received by the second functional unit from the non-volatile storage medium.

25. A non-transitory machine-readable storage medium including data that, when accessed by a processor, cause the processor to perform operations comprising:

creating, by a first functional unit of a processing device, an atomic transaction that declares a size of data to be updated atomically, wherein execution of the atomic transaction comprises a plurality of instructions to update the data at a set of addresses in a non-volatile storage medium, wherein the non-volatile storage medium is byte-addressable;

performing the atomic transaction; and

committing the atomic transaction to the set of addresses in the non-volatile storage medium, wherein the updated data is not visible to other functional units of the processing device until the atomic transaction is complete.