Load Compensation in RF Amplifiers

• US 20150097624A1
• Filed: 10/08/2013
• Published: 04/09/2015
• Est. Priority Date: 10/08/2013
• Status: Active Grant

• Current Assignee: pSemi Corporation (Murata Manufacturing Co Limited)
• Original Assignee: Peregrine Semiconductor Corporation (Murata Manufacturing Co Limited)
• Inventors: Olson, Chris, Nobbe, Dan William, Dykstra, Jeffrey A.
• Granted Patent: US 9,160,292 B2
• Time in Patent Office: Days
• US Class Current: 330/295
• CPC Class Codes: H03F 1/0277 Selecting one or more amplifiers from a plurality of amplifiers
• CPC Class Codes: H03F 1/223 with MOSFET's
• CPC Class Codes: H03F 2200/111 the amplifier being a dual or triple band amplifier, e.g. 900 and 1800 MHz, e.g. switched or not switched, simultaneously or not
• CPC Class Codes: H03F 2203/21145 Output signals are combined by switching a plurality of paralleled power amplifiers to a common output
• CPC Class Codes: H03F 3/189 High-frequency amplifiers, e.g. radio frequency amplifiers
• CPC Class Codes: H03F 3/193 with field-effect devices H03F3/195 takes precedence
• CPC Class Codes: H03F 3/20 Power amplifiers, e.g. Class B amplifiers, Class C amplifiers H03F3/26 - H03F3/30 take precedence
• CPC Class Codes: H03F 3/211 using a combination of several amplifiers H03F3/60 takes precedence
• CPC Class Codes: H03F 3/245 with semiconductor devices only
• CPC Class Codes: H03F 3/68 Combinations of amplifiers, e.g. multi-channel amplifiers for stereophonics power amplifiers using a combination of several semiconductor amplifiers H03F3/211; combinations of amplifiers using coupling networks with distributed constants H03F3/602

Abstract

Methods and systems for reducing parasitic loading on a power supply output in RF amplifier arrangements used in multiband and/or multitude RF circuits are presented. Such RF circuits can comprise a plurality of RF amplifiers of which only one is activated for a given desired transmission mode and/or band.

Claims

1. A circuital arrangement comprising:

a power supply unit;

a plurality of power amplifier units, each configured to receive power from a common output port of the power supply unit, and each configured to amplify an input radio frequency (RF) signal at an input port of the each power amplifier unit in correspondence of a different frequency band and/or mode of operation of a plurality of different frequency hands and/or modes of operation, and

one or more decoupling circuits,

wherein;

during operation of the circuital arrangement, one or more of the plurality of power amplifier units are deactivated, and

each of the one or more decoupling circuits is configured to remove a loading effect of the one or more deactivated power amplifier units on the common output port of the power amplifier unit.

2. The circuital arrangement according to claim 1, wherein during operation of the arrangement only one power amplifier unit of the plurality of power amplifier units is activated, and wherein the activated power amplifier unit is in correspondence of a different frequency band and/or mode of operation of the plurality of different frequency bands and/or modes of operation.

3. The circuital arrangement according to claim 1, wherein each of the plurality of power amplifier units comprises:

an RF amplifier comprising;

an output port m correspondence of an output transistor of the RF amplifier, wherein the output port is operatively coupled to the common output port of the power supply unit;

an input port in correspondence of an input transistor of the RF amplifier, wherein the input port is connected to the input port of the each power amplifier unit,

and

an output match network coupled to the output port in correspondence of the output transistor at a first port of the output match network,

wherein;

during an activated state of the power amplifier unit, the output match network is coupled via a second port of the output match network to an output load of the circuital arrangement, and an amplified RF signal in correspondence of the input RF signal and a current flow from the power supply unit through the output transistor is provided to the output load, and

during a deactivated state of the power amplifier unit, the output match network is decoupled from the output load of the circuital arrangement and no current flows from the power supply unit through the output transistor.

4. The circuital arrangement according to claim 1, wherein a decoupling circuit of the one or more decoupling circuits comprises a switch configured to remove a current flow in a conduction path of an output match network during a deactivated state of a power amplifier unit of the one or more deactivated power amplifier units.

5. The circuital arrangement according to claim 3, wherein a decoupling circuit of the one or more decoupling circuits comprises a switch configured to remove a current flow through the output match network during the deactivated state of the power amplifier unit.

6. The circuital arrangement according to claim 4 or claim 5, wherein the switch is in series connection between a third port of the output match network and a reference ground, and wherein during the deactivated state of the power amplifier unit the switch effectively decouples the output match network from the reference ground.

7. The circuital arrangement according to claim 4 or claim 5, wherein the switch is in series connection between the common output port of the power supply unit and an input power port of each of the plurality of the power amplifier units.

8. The circuital arrangement according to claim 7, wherein during the deactivated state of the power amplifier unit, the switch disconnects the power supply unit from the power amplifier unit.

9. The circuital arrangement according to claim 4 or claim 5, wherein the switch is a stacked transistor switch.

10. The circuital arrangement according to claim 4 or claim 5, wherein the loading effect is in correspondence of a stray capacitance and/or inductance from the output match network.

11. The circuital arrangement according to claim 2, wherein the output match network comprises one or more digitally tunable capacitors (DTCs) and/or digitally tunable inductors (DTLs).

12. The circuital arrangement according to claim 11, wherein during the deactivated state of the power amplifier unit, a capacitance value of the one or more digitally tunable capacitors is set to a minimum value.

13. The circuital arrangement according to claim 1, wherein the power supply unit is a variable power supply unit configured to output a dynamic time varying output signal at the common output port of the power supply unit.

14. The circuit arrangement according to claim 13, wherein the dynamic time varying output signal is in correspondence of an output power control signal provided to an output power control port of the power supply unit.

15. The circuit arrangement according to claim 14, wherein the dynamic time varying output signal of the power supply unit is an amplified version of the output power control signal.

16. The circuit arrangement according to claim 14, wherein the output power control signal is configured to adjust the dynamic time varying output signal based on a loading characteristic of an activated power amplifier unit of the plurality of power amplifier units.

17. The circuit arrangement according to claim 14, wherein the output power control signal is configured to adjust the dynamic time varying output signal based on a loading characteristic of the one or more deactivated power amplifier units.

18. The circuit arrangement according to claim 14, further comprising a load compensation circuit, wherein the load compensation circuit is configured to provide the output power control signal to the output power control port of the power supply unit based on an input signal to the load compensation circuit.

19. The circuit arrangement according to claim 18, wherein the load compensation circuit is configured to adjust one or more of:

a) a gain parameter, b) a phase parameter, and c) an offset parameter, in correspondence of the output power control signal.

20. The circuit arrangement according to claim 19, wherein the adjusting is in correspondence of an activated power amplifier unit in correspondence of a different frequency band and/or mode of operation of the plurality of frequency bands and/or modes of operation.

21. The circuit arrangement according to claim 20, wherein the adjusting comprises compensation of one or more of:

a), b) and c) based on a loading characteristic of the one or more deactivated power amplifier units.

22. The circuit arrangement according to claim 20 or claim 21, wherein the load compensation circuit further comprises one or more lookup tables, wherein a lookup table of the one or more lookup tables is configured to map a digital representation of the input signal to the load compensation circuit to a digital representation of the output power control signal.

23. The circuit arrangement according to claim 19, wherein the load compensation circuit further comprises a digital signal processor adapted to generate a digital representation of the output power control signal based on a digital representation of the input signal to the load compensation circuit and a provided gain/phase/offset compensation parameter.

24. The circuital arrangement according to claim 1 or claim 18 monolithically integrated.

25. The circuital arrangement according to claim 1 or claim 18 fabricated entirely or partially on an integrated circuit using silicon on sapphire (SOS) or silicon on insulator technology (SOI).

26. A circuital arrangement comprising:

a variable power supply unit;

a plurality of power amplifier units, each configured to receive power from a common output port of the power supply unit, and each configured to amplify an input radio frequency (RF) signal at an input port of the each power amplifier unit in correspondence of a different frequency band and/or mode of operation of a plurality of different frequency bands and/or modes of operation, and

a load compensation circuit,

wherein;

during operation of the circuital arrangement, one or more of the plurality of power amplifier units are deactivated, and

the load compensation circuit is configured to control the variable power supply unit such as to compensate a loading effect of the one or more deactivated power amplifier units on the common output port of the power amplifier unit.

27. The circuital arrangement according to claim 26, wherein each of the plurality of power amplifier units comprises:

an RF amplifier comprising;

an output port in correspondence of an output transistor of the RF amplifier, wherein the output port is operatively coupled to the common output port of the power supply unit;

an input port in correspondence of an input transistor of the RF amplifier, wherein the input port is connected to the input port of the each power amplifier unit,

and

an output match network coupled to the output port in correspondence of the output transistor at a first port of the output match network,

wherein;

during an activated state of the power amplifier unit, the output match network is coupled via a second port of the output match network to an output load of the circuital arrangement, and an amplified RF signal in correspondence of the input RF signal and a current flow from the power supply unit through the output transistor is provided to the output load, and

during a deactivated state of the power amplifier unit, the output match network is decoupled from the output load of the circuital arrangement and no current flows from the power supply unit through the output transistor.

28. The circuital arrangement according to claim 26, wherein the power supply unit comprises an output power control port configured to receive an output power control signal in correspondence of a desired output signal of the power supply unit at the common output port of the power supply unit, and wherein the load compensation circuit is configured to provide the output control signal such as to optimize operation of the circuital arrangement for an activated power amplifier unit in correspondence of a different frequency band and/or mode of operation of the plurality of different frequency bands and/or modes of operation.

29. The circuital arrangement according to claim 28, wherein the load compensation circuit is further configured to adjust the output control signal such as to compensate for the loading effect of the one or more deactivated power amplifier units on the common output port of the power supplier unit.

30. The circuit arrangement according to claim 28 or claim 29, wherein the load compensation circuit is configured to compensate for a change in one or more of:

a) a gain parameter, b) a phase parameter, and c) an offset parameter, of the output signal of the power supply unit in correspondence of the loading effect of the one or more deactivated power amplifier units on the common output port of the power amplifier unit.

31. The circuit arrangement according to claim 28, wherein the load compensation circuit further comprises one or more lookup tables, wherein a lookup table of the one or more lookup tables is configured to map a digital representation of an input signal to the load compensation circuit to a digital representation of the output power control signal.

32. The circuit arrangement according to claim 31, wherein the lookup table of the one or more lookup tables is in correspondence of the different frequency band and/or mode of operation of the plurality of different frequency bands and/or modes of operation.

33. The circuit arrangement according to claim 31, wherein the output signal of the power supply unit is an amplified version of the output power control signal.

34. The circuit arrangement according to claim 28, wherein the load compensation circuit further comprises a digital signal processor adapted to generate a digital representation of the output power control signal based on a digital representation of an input signal to the load compensation circuit and a provided gain/phase/offset compensation parameter.

35. A method for reducing loading of a power supply unit in a multi-mode and/or multi-band power amplifier arrangement, the method comprising:

providing a power supply unit;

providing a plurality of power amplifier units;

connecting the plurality of power amplifier units to a common output port of the power supply unit;

selecting a band and/or mode of operation of the amplifier arrangement;

based on the selecting, activating a corresponding power amplifier unit of the plurality of power amplifier units;

based on the selecting, deactivating one or more power amplifier units of the plurality of power amplifier units;

based on the deactivating, decoupling the one or more deactivated power amplifier units from the power supply unit, and

based on the decoupling, reducing a loading effect of the one or more deactivated power amplifier units on the power supply unit.

36. The method according to claim 35, further comprising:

providing a plurality of switches in correspondence of the plurality of power amplifier units, wherein each switch is configured to remove a current flow from the common output port of the power supply unit to a corresponding deactivated power amplifier unit.

37. The method according to claim 36, wherein the current flow is in correspondence of a conduction path between the common output port of the power supply unit and an output match circuit of the power amplifier unit.

38. The method according to claim 37, wherein the conduction path comprises a reactance in correspondence of the output match circuit of the power amplifier unit.

39. The method according to claim 35, wherein the power supply unit is a variable power supply unit configured to output a dynamic time varying output signal at the common output port of the power supply unit.

40. A method for compensating loading of a power supply unit in a multi-mode and/or multi-band power amplifier arrangement, the method comprising:

providing a variable power supply unit;

providing a plurality of power amplifier units;

connecting the plurality of power amplifier units to a common output port of the power supply unit;

selecting a band and/or mode of operation of the amplifier arrangement;

based on the selecting, activating a corresponding power amplifier unit of the plurality of power amplifier units;

based on the selecting, deactivating one or more power amplifier units of the plurality of power amplifier units, and

based on the deactivating and the activating, compensating a characteristic of a variable output signal at the common output port of the variable power supply unit.

41. The method according to claim 40, further comprising:

based on the deactivating and the activating, providing a mapping function for compensating the characteristic of the variable output signal;

providing a control signal for the variable power supply unit in correspondence of a desired variable output signal for the activated power supply unit;

applying the mapping function on the control signal;

based on the applying, obtaining a compensated control signal;

feeding the compensated control signal to the variable power supply unit, and

based on the feeding, obtaining the desired variable output signal.

42. The method according to claim 41, wherein the provided control signal is in correspondence of the desired variable output signal assuming only the activated power amplifier unit being connected to the common output port of the power supply unit.

43. The method according to claim 41, wherein the mapping is performed by a lookup table and/or a digital signal processor.

44. A circuital arrangement comprising:

a power supply unit;

a plurality of power amplifier units, wherein two or more power amplifier units of the plurality of power amplifier units are configured to receive power from a common output port of the power supply unit, and to amplify an input radio frequency (RF) signal at an input port of the two or more power amplifier units in correspondence of a different frequency band and/or mode of operation of a plurality of different frequency bands and/or modes of operation, and

a plurality of decoupling switches,

wherein each of the two or more power amplifier units comprises;

an RF amplifier comprising;

an output port in correspondence of an output transistor of the RF amplifier, wherein the output port is operatively coupled to the common output port of the power supply unit;

an input port in correspondence of an input transistor of the RF amplifier, wherein the input port is connected to the input port of the each power amplifier unit,

and

an output match network coupled to the output port in correspondence of the output transistor at a first port of the output match network, and connected to a first decoupling switch port of a decoupling switch of the plurality of decoupling switches at a second port of the output match network, wherein a second decoupling switch port of the decoupling switch is connected to a reference ground,

wherein a third port of an output match network of a power amplifier unit of the two or more power amplifier units is configured to provide an amplified version of an input RF signal to the power amplifier unit of the two or more power amplifier units.

46. The circuital arrangement according to any one of claim 44 or 45, further comprising an output load switch comprising a plurality of first output load switch terminals each connected to the third port of an output match network in correspondence of the two or more power amplifier units, and a second output load switch terminal connected to an output load of the circuital arrangement, wherein the output load switch is configured to connect any one of the plurality of first output load switch terminals to the second output load switch terminal.

45. A circuital arrangement comprising:

a power supply unit;

a plurality of power amplifier units, wherein two or more power amplifier units of the plurality of power amplifier units are configured to receive power from a common output port of the power supply unit, and to amplify an input radio frequency (RF) signal at an input port of the two or more power amplifier units in correspondence of a different frequency band and/or mode of operation of a plurality of different frequency bands and/or modes of operation, and

a decoupling switch connected to the common output port at a first terminal of the decoupling switch and configured to connect the first terminal to any one of a second terminal of a plurality of second terminals of the decoupling switch,

wherein each of the two or more power amplifier units comprises;

an RF amplifier comprising;

an output port in correspondence of an output transistor of the RF amplifier, wherein the output port is operatively coupled to a second terminal of the plurality of second terminals of the decoupling switch;

an input port in correspondence of an input transistor of the RF amplifier, wherein the input port is connected to the input port of the each power amplifier unit,

and

an output match network coupled to the output port in correspondence of the output transistor at a first port of the output match network, and connected to a reference ground at a second port of the output match network,

wherein a third port of an output match network of a power amplifier unit of the plurality of power amplifier units is configured to provide an amplified version of an input RF signal to the power amplifier unit of the plurality of power amplifier units.

47. The circuital arrangement according to claim 45, wherein the power supply unit is a variable power supply configured to output a dynamic time varying output signal at the common output port of the power supply unit based on a signal provided at an output power control port of the power supply unit.