Waveform Calibration Using Built In Self Test Mechanism

• US 20150177326A1
• Filed: 12/20/2013
• Published: 06/25/2015
• Est. Priority Date: 12/20/2013
• Status: Active Grant

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments Deutschland Gesellschaft Mit Beschrã¤Nkter Haftung (Texas Instruments, Inc.), Texas Instruments, Inc.
• Inventors: Chakraborty, Sudipto, Graul, Jens
• Granted Patent: US 9,176,188 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G01R 31/2822 of microwave or radiofrequency circuits of attenuation, gain, e.g. using network analyzers G01R27/28
• CPC Class Codes: G01R 31/31716 Testing of input or output with loop-back
• CPC Class Codes: G01R 31/3187 Built-in tests
• CPC Class Codes: H04B 17/13 of power amplifiers, e.g. gain or non-linearity
• CPC Class Codes: H04B 17/19 Self-testing arrangements

Abstract

A system on a chip (SoC) includes a transceiver comprising a transmitter having a power amplifier and a receiver having a signal buffer. At least one of the transmitter and receiver has a configurable portion that can be configured to produce a range of waveforms (both in waveshape as well as duty cycle). A low cost built in self test (BIST) logic is coupled to the transceiver. The BIST logic is operable to calibrate the configurable portion of the transceiver to produce a waveform that has a selected harmonic component that has an amplitude that is less than a threshold value. Current consumed by the transceiver may be dynamically reduced by selecting an optimized waveform that has low harmonic components.

Claims

1. A method for operating a transceiver on a chip, the method comprising:

performing a calibration procedure comprising;

generating first constant frequency signal using an adjustable power amplifier in a transmitter portion of the transceiver at a selected operating amplitude level;

generating a second constant frequency signal having a different but similar fundamental frequency as the first constant frequency signal in a receiver portion of the transceiver;

receiving a portion of the second constant frequency signal in the receiver portion of the transceiver;

down-converting the received portion of the first constant frequency signal using the second constant frequency signal to produce low frequency harmonic components indicative of a wave-shape of the first constant frequency signal;

adjusting the power amplifier across a range of power levels while monitoring an amplitude of one or more of the low frequency harmonic components; and

selecting an operating power for the adjustable power amplifier for which the amplitude of the one or more low frequency harmonic components is below a threshold value, whereby the wave-shape of the first constant frequency signal is optimized.

2. The method of claim 1, further comprising:

operating the transceiver for a period of time using the selected operating amplitude level; and

changing the selected operating amplitude level of the power amp and repeating the calibration procedure.

3. The method of claim 1, wherein the amplitude of the one or more low frequency harmonic components is monitored by taking a Fast Fourier Transform (FFT) of the down-converted low frequency harmonic components.

4. The method of claim 1, wherein the calibration procedure further comprises:

generating a third constant frequency signal using a power amplifier in the transmitter portion of the transceiver;

generating a fourth constant frequency signal having a different but similar fundamental frequency as the first constant frequency signal using an adjustable power buffer;

receiving a portion of the third constant frequency signal in the receiver portion of the transceiver;

down-converting the received portion of the amplified constant frequency signal using the fourth constant frequency signal to produce second low frequency harmonic components indicative of the wave-shape of the fourth amplified constant frequency signal;

adjusting the amplitude of the buffer across a range of power levels while monitoring an amplitude of one or more of the second low frequency harmonic components; and

selecting an operating power for the adjustable power buffer for which the amplitude of the one or more second low frequency harmonic components is below a threshold value, whereby the wave-shape of the fourth constant frequency signal is optimized.

5. A method for operating a transceiver on a chip, the method comprising:

placing the transceiver in a calibration mode, wherein the transceiver comprises a transmitter having a power amplifier and a receiver having a signal buffer, wherein at least one of the transmitter and receiver has a configurable portion that can be configured to produce a range of waveforms;

calibrating the configurable portion of the transceiver to produce a waveform that has a selected harmonic component that has an amplitude that is less than a threshold value while operating at a selected operating amplitude by;

down-converting a portion of a signal produced by the configurable portion to produce low frequency harmonic components indicative of a wave-shape of the signal; and

selecting an operating power for the configurable portion for which the amplitude of the one or more low frequency harmonic components is below the threshold value.

6. The method of claim 5, further comprising operating the transceiver using the selected operating power for the configurable portion.

7. The method of claim 6, further comprising selecting an operating amplitude level for the configurable portion prior to calibrating the configurable portion.

8. The method of claim 5, further comprising:

operating the transceiver for a period of time using the selected operating amplitude level; and

changing the selected operating amplitude level of the power amp and repeating the calibration procedure.

9. The method of claim 5, wherein calibrating the configurable portion further comprises:

generating first constant frequency signal using an adjustable power amplifier in a transmitter portion of the transceiver at the selected operating amplitude level;

generating a second constant frequency signal having a different but similar fundamental frequency as the first constant frequency signal in a receiver portion of the transceiver;

receiving a portion of the second constant frequency signal in the receiver portion of the transceiver;

down-converting the received portion of the first constant frequency signal using the second constant frequency signal to produce low frequency harmonic components indicative of a wave-shape of the first constant frequency signal;

adjusting the power amplifier across a range of power levels while monitoring an amplitude of one or more of the low frequency harmonic components; and

selecting an operating power for the adjustable power amplifier for which the amplitude of the one or more low frequency harmonic components is below a threshold value, whereby the wave-shape of the first constant frequency signal is optimized.

10. The method of claim 5, wherein calibrating the configurable portion further comprises:

generating first constant frequency signal using a power amplifier in a transmitter portion of the transceiver;

generating a second constant frequency signal having a different but similar fundamental frequency as the first constant frequency signal using an adjustable power buffer;

receiving a portion of the first constant frequency signal in a receiver portion of the transceiver;

down-converting the received portion of the amplified constant frequency signal using the second constant frequency signal to produce low frequency components indicative of the wave-shape of the second amplified constant frequency signal;

adjusting the amplitude of the buffer across a range of power levels while monitoring an amplitude of one or more of the low frequency components; and

selecting an operating power for the adjustable power buffer for which the amplitude of the one or more low frequency components is below a threshold value, whereby the wave-shape of the second constant frequency signal is optimized.

11. A system on a chip (SoC) comprising:

a transceiver comprising a transmitter having a power amplifier and a receiver having a signal buffer, wherein at least one of the transmitter and receiver has a configurable portion that can be configured to produce a range of waveforms; and

built in self test (BIST) logic coupled to the transceiver, wherein the BIST logic is operable to calibrate the configurable portion of the transceiver to produce a waveform that has a selected harmonic component that has an amplitude that is less than a threshold value, whereby current consumed by the transceiver is reduced.

12. The SoC of claim 11, wherein the configurable portion of the transceiver is the transmitter portion, wherein the power amplifier of the transmitter is operable to be configured to operate at different power levels.

13. The SoC of claim 12, further comprising a microprocessor controllably coupled to the power amplifier, wherein code executed by the microprocessor is operable to calibrate the power amplifier to produce a waveform that has a selected harmonic component that has an amplitude that is less than a threshold value.

14. The SoC of claim 13, wherein the power amplifier comprises a preamp stage having an adjustable gain and a first adjustable supply voltage and an output stage having a second adjustable supply voltage;

and

wherein the power amplifier is configurable to operate linearly or nonlinearly by adjusting the preamp gain and the first and second supply voltages.

15. The SoC of claim 11, wherein the configurable portion of the transceiver is the receiver portion, wherein the signal buffer of the receiver is operable to be configured to operate at different power levels.

16. The SoC of claim 15, further comprising a microprocessor controllably coupled to the receiver buffer amplifier, wherein code executed by the microprocessor is operable to calibrate the signal buffer to produce a waveform that has a selected harmonic component that has an amplitude that is less than a threshold value.

17. The SoC of claim 11, wherein the BIST logic is operable to calibrate the transceiver by:

configuring the transmitter to generate a first constant frequency signal with the power amplifier at a selected operating amplitude level;

configuring the receiver to generate a second constant frequency signal having a different but similar fundamental frequency as the first constant frequency signal, receive a portion of the second constant frequency, and down-convert the received portion of the first constant frequency signal using the second constant frequency signal to produce low frequency harmonic components indicative of a wave-shape of the first constant frequency signal;

adjusting the power amplifier across a range of power levels while monitoring an amplitude of one or more of the low frequency harmonic components; and

selecting an operating power for the adjustable power amplifier for which the amplitude of the one or more low frequency harmonic components is below a threshold value.