System and Method for Isolating I/O Execution via Compiler and OS Support

• US 20150234640A1
• Filed: 02/19/2014
• Published: 08/20/2015
• Est. Priority Date: 02/19/2014
• Status: Active Grant

• Current Assignee: Futurewei Technologies Incorporated (Huawei Investment & Holding Co., Ltd.)
• Original Assignee: Futurewei Technologies Incorporated (Huawei Investment & Holding Co., Ltd.)
• Inventors: Tian, Chen, Ye, Handong, Hu, Ziang
• Granted Patent: US 9,563,585 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G06F 13/24 using interrupt G06F13/32 takes precedence
• CPC Class Codes: G06F 8/41 Compilation
• CPC Class Codes: G06F 8/423 Preprocessors
• CPC Class Codes: G06F 8/451 Code distribution considering CPU load at run-time G06F9/505; load rebalancing G06F9/5083
• CPC Class Codes: G06F 8/48 Incremental compilation software reuse G06F8/36
• CPC Class Codes: G06F 8/51 Source to source
• CPC Class Codes: G06F 9/4812 by interrupt, e.g. masked
• CPC Class Codes: G06F 9/4881 Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

Embodiments are provided for isolating Input/Output (I/O) execution by combining compiler and Operating System (OS) techniques. The embodiments include dedicating selected cores, in multicore or many-core processors, as I/O execution cores, and applying compiler-based analysis to classify I/O regions of program source codes so that the OS can schedule such regions onto the designated I/O cores. During the compilation of a program source code, each I/O operation region of the program source code is identified. During the execution of the compiled program source code, each I/O operation region is scheduled for execution on a preselected I/O core. The other regions of the compiled program source code are scheduled for execution on other cores.

Claims

1. A method by a multiple-core computing system for executing Input/Output (I/O) and non-I/O operations, the method comprising:

designating at least a portion of a plurality of processing cores as an I/O core;

compiling a program source code, wherein the compiling includes identifying each I/O operation region of the program source code; and

executing the program source code using the processing cores, wherein the executing includes scheduling the I/O operation region on the I/O core.

2. The method of claim 1, wherein the designating includes:

setting interrupt controllers of the processing cores to ignore I/O interrupts;

selecting the I/O core upon booting an operating system (OS); and

turning on an interrupt handler for the I/O core upon loading a driver for an I/O device.

3. The method of claim 2, wherein turning on the interrupt handler for the I/O core includes configuring an interrupt request (IRQ) controller to unmask corresponding pins on the I/O core, and wherein unmasking the corresponding pins on the I/O core allows capturing the I/O interrupts by the I/O core.

4. The method of claim 2, wherein turning on the interrupt handler for the I/O core includes configuring interrupt-raising memory operations at the I/O device with correct destination addresses.

5. The method of claim 1, wherein designating at least the portion of the processing cores includes selecting a fixed number of the processing cores or a percentage of core total capacity as the I/O core.

6. The method of claim 1 further comprising reselecting the I/O core from the processing cores dynamically according to I/O workload, system throughput, or other system statistics.

7. The method of claim 1, wherein the compiling further includes marking each identified I/O operation region in the compiled program source code by inserting, at a start and end of the I/O operation region, pragmas annotating the start and end of the I/O operation region, and wherein the executing includes translating the pragmas into system calls instructing an operating system (OS) scheduler to move the execution of the I/O operation region to the I/O core.

8. The method of claim 1, wherein the I/O operation region is identified in accordance with at least one of sizes of the I/O operation region and other regions of the program source code, a number of I/O requests in the I/O operation region, and estimated execution times of the I/O operation region and the other regions of the program source code.

9. The method of claim 1, wherein the I/O operation region includes intensive I/O operations in comparison to other regions of the program source code.

10. A method by a multiple-core computing system for executing Input/Output (I/O) and non-I/O operations, the method comprising:

during compilation of a program source code, recognizing each I/O operation region of the program source code;

partitioning the I/O operation region from other regions of the program source code;

during execution of the compiled program source code, scheduling the I/O operation region for execution on a preselected I/O core; and

scheduling the other regions of the compiled program source code for execution on other cores.

11. The method of claim 10, wherein recognizing each I/O operation region of the program source code includes:

calculating a ratio of a number of I/O operations to a number of statements in a piece of of the program source code; and

upon determining that the ratio is above a defined threshold, designating the piece of the program source code as the I/O operation region.

12. The method of claim 10, wherein the I/O operation region is partitioned according to a cost model indicating an average runtime costs of the I/O operation and non-I/O statements of the program source code, and wherein partitioning the I/O operation region from the other regions of the program source code according to the cost mode satisfies load balance between the cores.

13. The method of claim 10 further comprising, during the compilation, merging consecutive I/O operation regions or other regions of the program source code according to available system resources.

14. The method of claim 10 further comprising, during the compilation, splitting the I/O operation region or other regions of the program source code according to available system resources.

15. The method of claim 10, wherein the partitioning includes:

inserting pragmas in each I/O operation region for the execution, wherein the pragmas mark the I/O operation region; and

inserting, in each I/O operation region, parameters indicating a number of I/O operations and a number of estimated runtime cycles to a scheduler for the execution.

16. The method of claim 10, wherein scheduling the I/O operation region for execution on a preselected I/O core includes creating an I/O operation region scheduler to schedule the I/O operation region.

17. A multiple-core computer for executing Input/Output (I/O) and non-I/O operations, the multiple-core computer comprising:

a plurality of processing cores; and

a non-transitory computer readable storage medium storing programming for execution by the at least one processor, the programming including instructions to;

designate at least a portion of the processing cores as an I/O core;

compile a program source code, wherein the instructions to compile the program source code include instructions to identify each I/O operation region of the program source code; and

execute the program source code using the processing cores, wherein the instructions to execute the program source code include instructions to schedule the I/O operation region on the I/O core.

18. The multiple-core computer of claim 17, wherein the instructions to designate at least the portion of the processing cores as the I/O core include instructions to:

set interrupt controllers of the at least a portion of the processing cores to ignore I/O interrupts;

select the I/O core upon booting an operating system (OS); and

turn on an interrupt handler for the I/O core upon loading a driver for an I/O device.

19. The multiple-core computer of claim 17, wherein the instructions to identify each I/O operation region of the program source code include instructions to:

insert, at a start and end of the I/O operation region, pragmas annotating the start and end of the I/O operation region; and

insert, in the I/O operation region, parameters indicating a number of I/O operations and a number of estimated runtime cycles to a scheduler.

20. The multiple-core computer of claim 17, wherein the instructions to execute the program source code includes instructions to:

invoke an operating system (OS) scheduler for scheduling execution of the compiled source code on the processing cores; and

creating an I/O operation region scheduler for scheduling the I/O operation region on the I/O core.