CIRCUIT ELEMENT SYNTHESIS AND OPTIMIZATION

• US 20150261900A1
• Filed: 05/12/2015
• Published: 09/17/2015
• Est. Priority Date: 10/03/2013
• Status: Active Grant

• Current Assignee: Ansys Incorporated
• Original Assignee: Helic SA (Ansys Incorporated)
• Inventors: BANTAS, SOTIRIOS, KAROUZAKIS, KONSTANTINOS, STEFANOU, STEFANOS, LIAPIS, APOSTOLOS, KOKKALAS, LABROS, NIKELLIS, KONSTANTINOS, LOURANDAKIS, ERRIKOS
• Granted Patent: US 9,824,165 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G06F 2111/04 Constraint-based CAD
• CPC Class Codes: G06F 2111/06 Multi-objective optimisation, e.g. Pareto optimisation using simulated annealing [SA], ant colony algorithms or genetic algorithms [GA]
• CPC Class Codes: G06F 2111/10 Numerical modelling
• CPC Class Codes: G06F 2111/20 Configuration CAD, e.g. designing by assembling or positioning modules selected from libraries of predesigned modules
• CPC Class Codes: G06F 2119/06 Power analysis or power optimisation
• CPC Class Codes: G06F 2119/18 Manufacturability analysis or optimisation for manufacturability
• CPC Class Codes: G06F 30/20 Design optimisation, verification or simulation optimisation, verification or simulation of circuit designs G06F30/30
• CPC Class Codes: G06F 30/36 Circuit design at the analogue level
• CPC Class Codes: G06F 30/367 Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods
• CPC Class Codes: G06F 30/373 Design optimisation
• CPC Class Codes: G06F 30/39 Circuit design at the physical level physical level design for reconfigurable circuits G06F30/347
• CPC Class Codes: G06F 30/398 Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM] optical proximity correction [OPC] design processes G03F1/36
• CPC Class Codes: H01F 5/003 Printed circuit coils

Abstract

A method for designing a circuit element of an integrated circuit (IC) includes receiving one or more desired characteristics of the circuit element from user input and iteratively determining a design solution through one or more simulations and modifications using a rule-set. The one or more desired characteristics are combined with other preset characteristics of the circuit element or the IC. A first model of the circuit element is defined and simulated to calculate performance. The first and subsequent models are modified by drawing on a rule-set of expert knowledge relating to general dependency of at least one design criterion, such as a physical, geometrical or performance characteristic, with another design criterion.

Claims

1. An apparatus for designing a transformer in an integrated circuit, the apparatus comprising

a processor;

a user interface adapted to allow a user to input one or more desired characteristics of the transformer;

wherein the one or more desired characteristics can include load impedances at primary and secondary coils of the transformer;

wherein the processor is configured to determine sufficient optimal characteristics of the transformer to define the transformer for fabrication in the integrated circuit by performing the steps of

combining the one or more desired characteristics with other preset characteristics of the transformer or the integrated circuit,

defining a first model of the transformer with typical load impedances,

simulating the first model having the combined characteristics to determine performance,

processing results of the simulation to calculate performance with the load impedances specified by the user,

further processing the results to obtain a mathematical model that includes tuning capacitors,

drawing on a rule-set of expert knowledge relating to general dependency of at least one design criterion, such as a physical, geometrical or performance characteristic, with another design criterion in order to enable modification of the first model, and

iteratively determining a design solution for the transformer through one or more simulations and modifications using the rule-set.

2. The apparatus of claim 1, wherein the user interface is adapted to allow a user to input one or more optimization targets;

and

wherein the processor further performs the steps of

solving a constrained optimization problem to determine optimal values of the tuning capacitors based on the one or more desired characteristics and the one or more optimization targets.

3. The apparatus of claim 2, wherein the one or more optimization targets include lowest possible insertion loss.

4. The apparatus of claim 1, wherein the transformer includes a plurality of taps connecting the primary coil to either a fixed potential, a signal, or a load.

5. The apparatus of claim 1, wherein the transformer includes a plurality of taps connecting the secondary coil to either a fixed potential, a signal, or a load.

6. A method for designing a transformer in an integrated circuit, the method comprising:

receiving one or more desired characteristics of the transformer from user input;

combining the one or more desired characteristics with other preset characteristics of the transformer or the integrated circuit;

defining a first model of the transformer with typical load impedances;

simulating the first model having the combined characteristics to determine performance;

processing results of the simulation to calculate performance with the load impedances specified by the user;

further processing the results to obtain a mathematical model that includes tuning capacitors;

drawing on a rule-set of expert knowledge relating to general dependency of at least one design criterion, such as a physical, geometrical or performance characteristic, with another design criterion in order to enable modification of the first model; and

iteratively determining a design solution for the transformer through one or more simulations and modifications using the rule-set.

7. The method of claim 6, further comprising:

receiving one or more optimization targets from user input; and

solving a constrained optimization problem to determine optimal values of the tuning capacitors based on the one or more desired characteristics and the one or more optimization targets.

8. The method of claim 7, wherein the one or more optimization targets include lowest possible insertion loss.

9. The method of claim 6, wherein the transformer includes a plurality of taps connecting the primary coil to either a fixed potential, a signal, or a load.

10. The method of claim 6, wherein the transformer includes a plurality of taps connecting the secondary coil to either a fixed potential, a signal, or a load.

11. A non-transitory machine readable medium having instructions thereon that when executed cause an apparatus to:

receive one or more desired characteristics of a transformer from user input;

combine the one or more desired characteristics with other preset characteristics of the transformer or an integrated circuit of which the transformer is a component;

define a first model of the transformer with typical load impedances;

simulate the first model having the combined characteristics to determine performance;

process results of the simulation to calculate performance with the load impedances specified by the user;

further process the results to obtain a mathematical model that includes tuning capacitors;

draw on a rule-set of expert knowledge relating to general dependency of at least one design criterion, such as a physical, geometrical or performance characteristic, with another design criterion in order to enable modification of the first model; and

iteratively determine a design solution for the transformer through one or more simulations and modifications using the rule-set.

12. The non-transitory machine readable medium of claim 11, further comprising instructions thereon that when executed cause an apparatus to:

receive one or more optimization targets from user input; and

solve a constrained optimization problem to determine optimal values of the tuning capacitors based on the one or more desired characteristics and the one or more optimization targets.

13. The method of claim 12, wherein the one or more optimization targets include lowest possible insertion loss.

14. The non-transitory machine readable medium of claim 12, wherein the transformer includes a plurality of taps connecting the primary coil to either a fixed potential, a signal, or a load.

15. The non-transitory machine readable medium of claim 12, wherein the transformer includes a plurality of taps connecting the secondary coil to either a fixed potential, a signal, or a load.