COMPARATOR FOR SYNCHRONOUS RECTIFICATION AND METHOD OF OPERATION
First Claim
1. A buck converter, comprising:
- a comparator having;
a first and second diode connected P-channel transistors, a source of the first and second P-channel transistors coupled to an output voltage of the converter, a drain of the first and second P-channel transistors coupled to a respective control gate of the first and second P-channel transistors;
a switch connected between the drain and the control gate of the second P-channel transistor and operated by a complementary P-gate signal;
,a first N-channel transistor having a drain coupled to the drain of the first P-channel transistor and a source coupled to a drain of a second N-channel transistor and a drain of a third N-channel transistor;
the second N-channel transistor includes a control gate coupled to the complementary P-gate signal, and a source coupled to ground;
the third N-channel transistor includes a control gate coupled to an N-gate signal, and a source coupled to a coil voltage;
a fourth N-channel transistor having a drain coupled to the drain of the second P-channel transistor and a source coupled to a drain of a fifth N-channel transistor and a drain of a sixth N-channel transistor;
the fifth N-channel transistor includes a control gate coupled to the N-gate signal, and a source coupled to ground; and
the sixth N-channel transistor includes a control gate coupled to the complementary P-gate signal, and a source coupled to ground.
17 Assignments
0 Petitions
Accused Products
Abstract
A buck converter includes a comparator having first and second gain stages that operate in compare and auto-zero modes. The comparator measures voltage drop across an N-channel transistor to determine when current through an inductor reaches zero. When the inductor current reaches zero, the N-channel transistor becomes inactive to prevent a reduction in efficiency caused by allowing negative inductor current to draw current from a load. The comparator is then placed in a low power state. When the comparator is not in a compare mode, the comparator can operate in an auto-zero mode to cancel offset when measuring the input of the comparator.
5 Citations
20 Claims
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1. A buck converter, comprising:
a comparator having; a first and second diode connected P-channel transistors, a source of the first and second P-channel transistors coupled to an output voltage of the converter, a drain of the first and second P-channel transistors coupled to a respective control gate of the first and second P-channel transistors; a switch connected between the drain and the control gate of the second P-channel transistor and operated by a complementary P-gate signal;
,a first N-channel transistor having a drain coupled to the drain of the first P-channel transistor and a source coupled to a drain of a second N-channel transistor and a drain of a third N-channel transistor; the second N-channel transistor includes a control gate coupled to the complementary P-gate signal, and a source coupled to ground; the third N-channel transistor includes a control gate coupled to an N-gate signal, and a source coupled to a coil voltage; a fourth N-channel transistor having a drain coupled to the drain of the second P-channel transistor and a source coupled to a drain of a fifth N-channel transistor and a drain of a sixth N-channel transistor; the fifth N-channel transistor includes a control gate coupled to the N-gate signal, and a source coupled to ground; and the sixth N-channel transistor includes a control gate coupled to the complementary P-gate signal, and a source coupled to ground. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A DC-DC buck converter comprising:
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an inductor having a first terminal coupled to a coil voltage; a capacitor having a first terminal coupled to a second terminal of the inductor and a second terminal coupled to ground; a comparator having a first input coupled to the coil voltage and a second input coupled to ground, the comparator including; a first diode-connected P-channel transistor; a second diode-connected P-channel transistor having a switch coupled between a drain and a control gate; a capacitor having a first terminal coupled to a control gate of the first diode-connected P-channel transistor and a second terminal coupled to the control gate of the second diode-connected P-channel transistor; a first N-channel transistor having a drain coupled to a drain of the first diode-connected P-channel transistor; a second N-channel transistor having a drain coupled to a source of the first N-channel transistor, a control gate coupled to a complementary P-gate signal and a source coupled to ground; a third N-channel transistor having a control gate coupled to an N-gate signal, a drain coupled to the source of the first N-channel transistor and a source coupled to the coil voltage; a fourth N-channel transistor having a drain coupled to the source of the second diode-connected P-channel transistor and a control gate coupled to a control gate of the first N-channel transistor and a current source; a fifth N-channel transistor having a control gate coupled to the N-gate signal, a drain coupled to a source of the fourth N-channel transistor and a source coupled to ground; a sixth N-channel transistor having a drain coupled to the source of the fourth N-channel transistor, a control gate coupled to a complementary P-gate signal and a source coupled to ground. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19, 20)
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Specification