System and Method for a Driving a Radio Frequency Switch

• US 20150288359A1
• Filed: 04/02/2014
• Published: 10/08/2015
• Est. Priority Date: 04/02/2014
• Status: Active Grant

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Bakalski, Winfried, Thomas, Anthony
• Granted Patent: US 9,966,946 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H03K 17/6872 using complementary field-effect transistors
• CPC Class Codes: H03K 17/693 Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors logic circuits H03K19/00; code converters H03M5/00, H03M7/00

Abstract

In accordance with an embodiment, a radio frequency (RF) switching circuit includes a plurality of series connected RF switch cells having a load path and a control node, and a switch driver coupled to the control node. Each of the plurality of series connected RF switch cells includes a switch transistor and a gate resistor having a first end coupled to a gate of the switch transistor and a second end coupled to the control node. The switch driver includes a variable output impedance that varies with a voltage of the control node.

Claims

1. A radio frequency (RF) switching circuit comprising:

a plurality of series connected RF switch cells comprising a load path and a control node, wherein each of the plurality of series connected RF switch cells comprises a switch transistor and a gate resistor having a first end coupled to a gate of the switch transistor and a second end coupled to the control node; and

a switch driver coupled to the control node, the switch driver comprising a variable output impedance that varies with a voltage of the control node.

2. The RF switching circuit of claim 1, wherein the switch driver comprises a first current source coupled between a first reference voltage node and the control node;

and a second current source coupled between a second reference voltage node and the control node.

3. The RF switching circuit of claim 2, wherein the second reference voltage node comprises a ground node.

4. The RF switching circuit of claim 2, wherein the first current source comprises a first current mirror, and the second current source comprises a second current mirror.

5. The RF switching circuit of claim 4, further comprising:

a first shutoff switch coupled in series with the first current mirror;

a second shutoff switch coupled in series with the second current mirror;

a first comparator configured to compare the control node to a first threshold voltage and to turn off the first shutoff switch when the voltage of the control node crosses the first threshold voltage in a first direction; and

a second comparator configured to compare the control node to a second threshold voltage and to turn off the second shutoff switch when the voltage of the control node crosses the second threshold voltage in a second direction opposite the first direction.

6. RF switching circuit of claim 5, wherein:

the first shutoff switch comprises a first transistor coupled in series with an input of the first current mirror; and

the second shutoff switch comprises a second transistor coupled in series with an input of the second current mirror.

7. The RF switching circuit of claim 4, wherein the first current mirror and the second current mirror comprise stacked current mirrors.

8. The RF switching circuit of claim 4, further comprising a level shifter circuit having an input coupled to inputs of the first current mirror and the second current mirror.

9. The RF switching circuit of claim 8 further comprising a Schmitt trigger having an output coupled to an input of the level shifter circuit.

10. The RF switching circuit of claim 1, wherein the switch driver comprises a switchable impedance element coupled to the control node, wherein the switchable impedance element comprises a fixed impedance element and a bypass switch coupled in parallel with the fixed impedance element.

11. The RF switching circuit of claim 10, further comprising a first driver transistor coupled between a first reference voltage node and an intermediate node;

and a second driver transistor coupled between a second reference voltage node and an intermediate node, wherein the switchable impedance element is coupled between the intermediate node and the control node.

12. The RF switching circuit of claim 10, further comprising a control circuit configured to close the bypass switch when a voltage of the control node crosses a threshold.

13. The RF switching circuit of claim 10, further comprising:

a replica switch comprising a replica transistor and a replica resistor having a first end coupled to a gate of the replica transistor and a second end coupled to the switchable impedance element; and

a comparator having a first input coupled to the gate of the replica transistor, a second input coupled to a threshold voltage node, and an output coupled to a control terminal of the bypass switch.

14. The RF switching circuit of claim 1, wherein the switch driver comprises:

a first variable resistance coupled between a first reference voltage node and the control node; and

a second variable resistance coupled between a second reference voltage node and the control node.

15. The RF switching circuit of claim 14, further comprising:

a first switch coupled in series with the first variable resistance; and

a second switch coupled in series with the second variable resistance.

16. A radio frequency integrated circuit (RFIC) comprising:

a first RF switch disposed on a semiconductor substrate, the first RF switch having a load path coupled between a first terminal and a second terminal; and

a first RF switch driver coupled to a first control node of the first RF switch, the first RF switch driver comprising a first current source coupled between a first reference node and the first control node and a second current source coupled between a second reference node and the first control node.

17. The RFIC of claim 16, further comprising:

a second RF switch disposed on the semiconductor substrate, the second RF switch comprising a load terminal coupled between the second terminal and a third terminal; and

a second RF switch driver coupled to a second control node of the second RF switch, the second RF switch driver comprising a third current source coupled between the first reference node and the second control node and a fourth current source coupled between the second reference node and the second control node.

18. The RFIC of claim 16, wherein the first current source comprises a first current mirror, and the second current source comprises a second current mirror.

19. The RFIC of claim 18, wherein the first current mirror comprises a first stacked current mirror and the second current source comprises a second stacked current mirror.

20. The RFIC of claim 18, further comprising:

a switching logic circuit;

a first series resistor coupled between a first output of the switching logic circuit and an input of the first current mirror; and

a second series resistor coupled between a second output of the switching logic circuit and an input of the second current mirror.

21. The RFIC of claim 20, further comprising:

a first shutoff switch coupled in series with the first resistor;

a second shutoff switch coupled in series with the second resistor;

a first comparator configured to compare a voltage of the first control node to a first threshold voltage and to turn off the first shutoff switch when the voltage of the first control node crosses the first threshold voltage in a first direction; and

a second comparator configured to compare the voltage of the first control node to a second threshold voltage and to turn off the second shutoff switch when the voltage of the first control node crosses the second threshold voltage in a second direction opposite the first direction.

22. RF switching circuit of claim 21, wherein:

the first shutoff switch comprises a first transistor; and

the second shutoff switch comprises a second transistor.

23. The RFIC of claim 20, wherein the switching logic circuit comprises a Schmitt trigger coupled to a level shifter, wherein the level shift comprises a first output coupled to the first output of the switching logic circuit and a second output coupled to the second output of the switching logic circuit.

24. The RFIC of claim 16, wherein the first RF switch comprises a plurality of series connected RF switch cells comprising a load path and a control node, wherein each of the plurality of series connected RF switch cells comprises a switch transistor and a gate resistor having a first end coupled to a gate of the switch transistor and a second end coupled to the control node.

25. A method of operating a radio frequency (RF) switching circuit comprising a load path and a control node, wherein the RF switching circuit comprises a plurality of series connected RF switch cells, each of the plurality of series connected RF switch cells comprising a switch transistor and a gate resistor having a first end coupled to a gate of the switch transistor and a second end coupled to the control node, wherein the method comprises:

applying a first static voltage to the control node of the RF switching circuit at a first applied impedance;

changing the voltage of the control node of the RF switching circuit form the first static voltage to a second static voltage, wherein changing the voltage comprises charging the control node of the RF switching circuit at a second applied impedance; and

applying the second static voltage to the control node of the RF switching circuit at a third applied impedance.

26. The method of claim 25, wherein the steps of applying the first static voltage, changing the voltage, and applying the second static voltage comprises using a first current mirror coupled between a first reference voltage and the control node, and using a second current mirror coupled between a second reference voltage and a control node.

27. The method of claim 25, wherein:

the steps of applying the first static voltage and applying the second static voltage comprises coupling a fixed impedance between a switchable reference voltage generator and the control node; and

the step of changing the voltage comprises bypassing the fixed impedance.

28. The method of claim 27, further comprising:

comparing a gate voltage of a replica transistor with a voltage of the control node; and

determining when to bypass the fixed impedance based on the comparing.

29. The method of claim 25, wherein:

the first applied impedance is greater than the second applied impedance; and

the third applied impedance is greater than the second applied impedance.