ULTRA LOW POWER SENSING PLATFORM WITH MULTIMODAL RADIOS

• US 20150303975A1
• Filed: 08/30/2013
• Published: 10/22/2015
• Est. Priority Date: 08/30/2012
• Status: Active Grant

• Current Assignee: University of Virginia Patent Foundation (University of Virginia)
• Original Assignee: University of Virginia Patent Foundation (University of Virginia)
• Inventors: Calhoun, Benton H., Wentzloff, David D., Roberts, Nathan E., Shakhsheer, Yousef, Zhang, Yanqing, Klinefelter, Alicia, Oh, Seunghyun
• Granted Patent: US 9,729,189 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H04B 1/1607 Supply circuits converters H02M; filters therefor H02M1/14; voltage stabilisers G05F1/46
• CPC Class Codes: H04B 1/406 with more than one transmission mode, e.g. analog and digital modes
• CPC Class Codes: H04W 4/70 Services for machine-to-machine communication [M2M] or machine type communication [MTC]
• CPC Class Codes: Y02D 30/70 in wireless communication networks

Abstract

An apparatus comprises a system on a chip (SoC). In some embodiments, the SoC includes a power supply circuit, a power management circuit operatively coupled to the power supply circuit, a first wireless communications circuit and a second wireless communications circuit. The first wireless communications circuit is configured to receive an RF signal and is operatively coupled to the power supply circuit and the power management circuit. The first wireless communications circuit has a net radio frequency (RF) power gain no more than unity before at least one of downconversion of the RF signal or detection of the RF signal. The second wireless communications circuit is operatively coupled to the power supply circuit and the power management circuit.

Claims

1. An apparatus, comprising:

a system on a chip (SoC) including;

a power supply circuit;

a power management circuit operatively coupled to the power supply circuit;

a first wireless communications circuit configured to receive an RF signal and operatively coupled to the power supply circuit and the power management circuit, the first wireless communications circuit having a net radio frequency (RF) power gain such that an output signal power is no greater than an input signal power and the first wireless communications circuit being configured to remain operational constantly during operation of the SoC; and

a second wireless communications circuit operatively coupled to the power supply circuit and the power management circuit.

2. The apparatus of claim 1, wherein:

the first wireless communications circuit is configured to operate according to a first communication standard,

the second wireless communications circuit is configured to operate according to a second communication standard different than the first communication standard.

3. The apparatus of claim 1, wherein:

the RF signal is a first RF signal;

the first wireless communications circuit is configured to receive the first RF signal at a first frequency band,

the second wireless communications circuit is configured to perform at least one of transmit a second RF signal or receive a third RF signal at a second frequency band different than the first frequency band.

4. The apparatus of claim 1, wherein:

the RF signal is a first RF signal;

the first wireless communications circuit is configured to receive the first RF signal at a first frequency band,

the second wireless communications circuit is configured to transmit a second RF signal at a second frequency band different than the first frequency band, the second wireless communications circuit having an ultra-wideband (UWB) transmitter.

5. The apparatus of claim 1, wherein:

the SoC includes a memory circuit and a digital processor circuit,

the first wireless communications circuit is configured to receive the RF signal without requiring use of the digital processor circuit, the RF signal having information, the first wireless communications circuit is configured to send the information to the memory circuit without requiring use of the digital processor circuit.

6. The apparatus of claim 1, further comprising:

an analog sensor interface circuit operatively coupled to the SoC, the analog sensor interface circuit and the SoC collectively defining a wireless sensor node configured to collect sensor data and send wirelessly a signal based on the sensor data.

7. The apparatus of claim 1, wherein:

the power supply circuit includes an energy harvesting circuit,

the power management circuit, the first wireless communications circuit and the second wireless communication circuit configured to be powered by the energy harvesting circuit.

8. The apparatus of claim 1, wherein:

the power management circuit is configured to select an operational mode from a plurality of operational modes based on at least one of (1) an amount of energy incoming to the SoC, (2) an amount of stored energy associated with the SoC, or (3) a rate of power consumption by the SoC, the plurality of operational modes including a first operational mode and a second operational mode,

the power management circuit configured to send a signal to the first wireless communication circuit when the first operational mode is selected such that the first wireless communication circuit is activated,

the power management circuit configured to send a signal to the second wireless communication circuit when the second operational mode is selected such that the second wireless communication circuit is activated.

9. The apparatus of claim 1, wherein:

the SoC includes a first transistor and a second transistor,

the first wireless communication circuit is operatively coupled to the first transistor, the first transistor is configured to gate power received by the first wireless communication circuit,

the second wireless communication circuit is operatively coupled to the second transistor, the second transistor is configured to gate power received by the second wireless communication circuit.

21. The apparatus of claim 1, wherein the first wireless communications circuit includes an ultra-low-power architecture that consumes less than 100 nW at a sensitivity of about −

40 decibels relative to one milliwatt.

10. An apparatus, comprising:

a system on chip (SoC) having a first memory circuit portion and a second memory circuit portion, the first memory circuit portion configured to operate at a subthreshold voltage, the second memory circuit portion configured to operate at a superthreshold voltage,

the SoC configured to access the second memory circuit portion when at least one of (1) signals are sent from the SoC, or (2) signals are received at the SoC.

11. The apparatus of claim 10, wherein:

the first memory circuit portion is configured to operate at the subthreshold voltage and not at a superthreshold voltage;

the second memory circuit portion is configured to operate at the superthreshold voltage and not at a subthreshold voltage.

12. The apparatus of claim 10, wherein:

the first memory circuit portion and the second memory circuit portion collectively define a memory circuit having a first operational mode and a second operational mode,

the memory circuit configured to operate the first memory circuit portion when the memory circuit is in the first operational mode, the memory circuit configured to operate the second memory circuit portion when the memory circuit is in the second operational mode.

13. The apparatus of claim 10, wherein:

the first memory circuit portion and the second memory circuit portion collectively define a memory circuit having a first operational mode and a second operational mode,

the memory circuit configured to operate the first memory circuit portion and not the second memory circuit portion when the memory circuit is in the first operational mode, the memory circuit configured to operate the second memory circuit portion and not the first memory circuit portion when the memory circuit is in the second operational mode.

14. An apparatus, comprising:

a SoC including a prediction circuit and a power management circuit;

the prediction circuit is configured to receive a plurality of status signals from an energy harvesting circuit, each status signal from the plurality of status signals indicating an amount of energy harvested by the harvesting circuit during a time period from a plurality of time periods; and

the prediction circuit is configured to send to the power management circuit a prediction signal based on the plurality of status signals, the power management circuit configured to select an operational mode of the SoC associated with a power consumption level based on the prediction signal.

15. The apparatus of claim 14, wherein:

the power management circuit is configured to select an operational mode from a plurality of operational modes based on at least one of (1) an amount of energy incoming to the SoC, (2) an amount of stored energy associated with the SoC, or (3) a rate ofpower consumption by the SoC, the plurality of operational modes including a first operational mode and a second operational mode,

the power management circuit configured to send a signal to a first wireless communication circuit when the first operational mode is selected such that the first wireless communication circuit is activated,

the power management circuit configured to send a signal to a second wireless communication circuit when the second operational mode is selected such that the second wireless communication circuit is activated.

16. The apparatus of claim 14, wherein:

the SoC including a first wireless communication circuit and a second wireless communication circuit,

the power management circuit configured to select an operational mode from a plurality of operational modes including a first operational mode and a second operational mode,

the power management circuit configured to send a first signal to the first wireless communication circuit when the first operational mode is selected, the first wireless communication circuit being activated in response to the first signal,

the power management circuit configured to send a second signal to a second wireless communication circuit when the second operational mode is selected, the second wireless communication circuit being activated in response to the second signal.

17. An apparatus, comprising:

a system on chip (SoC) having a first circuit portion and a second circuit portion, the first circuit portion defining a phase locked loop (PLL) and configured to operate at a subthreshold voltage, the second circuit portion including a power management circuit.

18. The apparatus of claim 17, wherein the first circuit portion is configured to output a signal having a selected clock frequency.

19. The apparatus of claim 17, wherein:

the SoC having a third circuit portion defining a frequency locked loop (FLL) and being operatively coupled to the first circuit portion and the second circuit portion, the first circuit portion and the third circuit portion collectively configured to output a signal having a selected clock frequency,

the SoC having the ability to lock the frequency of the first circuit portion to the third circuit portion or (/and) to lock the frequency of the third circuit portion to the first circuit portion,

the SoC supporting operating modes in which one of the first circuit portion or the third circuit portion is placed in a low power off state while the other circuit portion maintains the output signal having a selected clock frequency.

20. The apparatus of claim 17, wherein:

the first circuit portion is associated with an operational frequency range,

the SoC having a third circuit portion defining a frequency locked loop (FLL) and associated with an operational frequency range, the third circuit portion being operatively coupled to the first circuit portion and the second circuit portion,

the first circuit portion and the third circuit portion collectively configured to be operable over an operational frequency range greater than the operational frequency range of the first circuit portion and the operational frequency range of the third circuit portion.

22. An apparatus, comprising:

a system on a chip (SoC) including;

a power supply circuit;

a power management circuit operatively coupled to the power supply circuit;

a first wireless communications circuit configured to receive an RF signal and operatively coupled to the power supply circuit and the power management circuit, the first wireless communications circuit having a net radio frequency (RF) power gain such that an output signal power is no greater than an input signal power before downconversion of the RF signal; and

a second wireless communications circuit operatively coupled to the power supply circuit and the power management circuit.