DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF

• US 20150313014A1
• Filed: 07/09/2015
• Published: 10/29/2015
• Est. Priority Date: 09/20/2002
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: YAMAZAKI, Shunpei, OSAME, Mitsuaki
• Granted Patent: US 9,622,345 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G02F 1/133345 Insulating layers G02F1/1335, G02F1/1337, G02F1/135, G02F1/136 take precedence
• CPC Class Codes: G02F 1/136286 Wiring, e.g. gate line, drain line
• CPC Class Codes: G02F 1/13629 Multilayer wirings
• CPC Class Codes: G02F 1/136295 Materials; Compositions; Manufacture processes
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: G02F 2201/123 pixel
• CPC Class Codes: H01L 23/50 for integrated circuit devices, e.g. power bus, number of leadsH01L23/482 - H01L23/498 take precedence
• CPC Class Codes: H01L 23/53238 Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1248 with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H05K 1/09 Use of materials for the conductive, e.g. metallic pattern
• CPC Class Codes: H05K 5/0017 with operator interface units
• CPC Class Codes: H10K 59/122 Pixel-defining structures or layers, e.g. banks
• CPC Class Codes: H10K 59/124 Insulating layers formed between TFT elements and OLED elements
• CPC Class Codes: H10K 59/1315 comprising structures specially adapted for lowering the resistance

Abstract

It is an object of the present invention to prevent an influence of voltage drop due to wiring resistance, trouble in writing of a signal into a pixel, and trouble in gray scales, and provide a display device with higher definition, represented by an EL display device and a liquid crystal display device. In the present invention, a wiring including Cu is provided as an electrode or a wiring used for the display device represented by the EL display device and the liquid crystal display device. Besides, sputtering is performed with a mask to form the wiring including Cu. With such structure, it is possible to reduce the voltage drop and a deadened signal.

Claims

1. (canceled)

2. A display device comprising:

a first insulating layer;

a semiconductor layer over the first insulating layer;

a gate insulating layer over the semiconductor layer;

a gate electrode over the gate insulating layer;

a second insulating layer over the gate electrode; and

a third insulating layer comprising organic material over the second insulating layer;

wherein the gate electrode comprises a first layer comprising titanium and a second layer comprising copper,

wherein the second layer is over and in contact with the first layer, and

wherein the third insulating layer comprises a rounded portion.

3. The display device according to claim 2, wherein the second layer is narrower than the first layer.

4. The display device according to claim 2, wherein the first insulating layer comprises a silicon oxynitride film.

5. The display device according to claim 2, wherein the second insulating layer comprises a silicon nitride film or a silicon oxynitride film.

6. The display device according to claim 2, wherein the organic material is any one of polyimide, acrylic, polyamide, and polyimideamide.

7. The display device according to claim 2, wherein the first layer is a conductive barrier film comprising TiN.

8. The display device according to claim 2,

wherein the gate insulating layer comprises a first opening,

wherein the second insulating layer comprises a second opening, and

wherein the first opening and the second opening are overlapped with each other.

9. A display device comprising:

a first insulating layer;

a semiconductor layer over the first insulating layer;

a gate electrode adjacent to the semiconductor layer with a gate insulating layer interposed therebetween;

a second insulating layer over the gate electrode; and

a third insulating layer comprising organic material over the second insulating layer;

wherein the gate electrode comprises a first layer comprising titanium and a second layer comprising copper,

wherein the second layer is over and in contact with the first layer, and

wherein the third insulating layer comprises a rounded portion.

10. The display device according to claim 9, wherein the second layer is narrower than the first layer.

11. The display device according to claim 9, wherein the first insulating layer comprises a silicon oxynitride film.

12. The display device according to claim 9, wherein the second insulating layer comprises a silicon nitride film or a silicon oxynitride film.

13. The display device according to claim 9, wherein the organic material is any one of polyimide, acrylic, polyamide, and polyimideamide.

14. The display device according to claim 9, wherein the first layer is a conductive barrier film comprising TiN.

15. The display device according to claim 9,

wherein the gate insulating layer comprises a first opening,

wherein the second insulating layer comprises a second opening, and

wherein the first opening and the second opening are overlapped with each other.

16. A display device comprising:

a first insulating layer;

a semiconductor layer over the first insulating layer;

a gate insulating layer over the semiconductor layer;

a gate electrode over the gate insulating layer;

a second insulating layer over the gate electrode;

a third insulating layer comprising organic material over the second insulating layer; and

a source electrode or a drain electrode over the semiconductor layer,

wherein the gate electrode comprises a first layer comprising titanium and a second layer comprising copper,

wherein the second layer is over and in contact with the first layer,

wherein the third insulating layer comprises a rounded portion,

wherein the gate insulating layer comprises a first opening,

wherein the second insulating layer comprises a second opening, and

wherein the source electrode or the drain electrode is electrically connected to the semiconductor layer through the first opening and the second opening.

17. The display device according to claim 16, wherein the second layer is narrower than the first layer.

18. The display device according to claim 16, wherein the first insulating layer comprises a silicon oxynitride film.

19. The display device according to claim 16, wherein the second insulating layer comprises a silicon nitride film or a silicon oxynitride film.

20. The display device according to claim 16, wherein the organic material is any one of polyimide, acrylic, polyamide, and polyimideamide.

21. The display device according to claim 16, wherein the first layer is a conductive barrier film comprising TiN.

22. The display device according to claim 16, wherein the first opening and the second opening are overlapped with each other.