DISPLAY DEVICE AND INPUT/OUTPUT DEVICE

• US 20150317028A1
• Filed: 04/24/2015
• Published: 11/05/2015
• Est. Priority Date: 05/02/2014
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: TAKAHASHI, Kei, MIYAKE, Hiroyuki
• Granted Patent: US 10,521,032 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G06F 2203/04102 Flexible digitiser, i.e. constructional details for allowing the whole digitising part of a device to be flexed or rolled like a sheet of paper
• CPC Class Codes: G06F 3/041 Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
• CPC Class Codes: G06F 3/0412 Digitisers structurally integrated in a display
• CPC Class Codes: G06F 3/04166 Details of scanning methods, e.g. sampling time, grouping of sub areas or time sharing with display driving Synchronisation with the driving of the display or the backlighting unit to avoid interferences generated internally G06F3/04184
• CPC Class Codes: G06F 3/04182 Filtering of noise external to the device and not generated by digitiser components
• CPC Class Codes: G06F 3/042 by opto-electronic means
• CPC Class Codes: G06F 3/044 by capacitive means
• CPC Class Codes: G09G 2300/0842 forming a memory circuit, e.g. a dynamic memory with one capacitor
• CPC Class Codes: G09G 2300/0876 Supplementary capacities in pixels having special driving circuits and electrodes instead of being connected to common electrode or ground; Use of additional capacitively coupled compensation electrodes
• CPC Class Codes: G09G 2310/02 Addressing, scanning or driving the display screen or processing steps related thereto
• CPC Class Codes: G09G 2320/0295 by monitoring each display pixel
• CPC Class Codes: G09G 2320/043 Preventing or counteracting the effects of ageing
• CPC Class Codes: G09G 2380/02 Flexible displays
• CPC Class Codes: G09G 3/3233 with pixel circuitry controlling the current through the light-emitting element

Abstract

A circuit which detects an output current from a pixel and an output current from an input device, and converts the output current into data is provided. The current detection circuit includes an integrator circuit, a comparator, a counter, and a latch. The integrator circuit integrates the potential of a first signal during a period determined by a second signal and outputting it as a third signal. The comparator compares the potential of the third signal with a first potential and outputting a fourth signal. The counter outputs the number of pulses included in a fifth signal as a sixth signal during a period determined by the fourth signal. The latch holds the sixth signal. The integrator circuit preferably further includes an operational amplifier and some capacitors. The first signal is supplied from a pixel included in a display device or an input portion included in an input device.

Claims

1. A current detection circuit comprising:

an integrator circuit;

a comparator;

a counter; and

a latch,

wherein the integrator circuit is configured to integrate a potential of a first signal during a period determined by a second signal, and to output the integrated potential as a third signal,

wherein the comparator is configured to compare a potential of the third signal with a first potential, and to output a fourth signal,

wherein the counter is configured to output a number of pulses included in a fifth signal as a sixth signal during a period determined by the fourth signal, and

wherein the latch is configured to hold the sixth signal.

2. The current detection circuit according to claim 1, wherein the integrator circuit comprises an operational amplifier and a first capacitor.

3. The current detection circuit according to claim 2, wherein the integrator circuit further comprises a second capacitor.

4. The current detection circuit according to claim 1,

wherein the first signal is supplied from a pixel, and

wherein the pixel is included in a display device or an input device.

5. An input/output device comprising:

an IC comprising;

a current detection circuit comprising;

an integrator circuit;

a comparator;

a counter; and

a latch; and

a display device comprising a driver circuit and a pixel,

wherein the integrator circuit is configured to integrate a potential of a first signal during a period determined by a second signal, and to output the integrated potential as a third signal,

wherein the comparator is configured to compare a potential of the third signal with a first potential, and to output a fourth signal,

wherein the counter is configured to output a number of pulses included in a fifth signal as a sixth signal during a period determined by the fourth signal, and

wherein the latch is configured to hold the sixth signal.

6. The input/output device according to claim 5, wherein the first signal is supplied from the pixel.

7. The input/output device according to claim 5, wherein the integrator circuit comprises an operational amplifier and a first capacitor.

8. The input/output device according to claim 7, wherein the integrator circuit further comprises a second capacitor.

9. An input/output device comprising:

an IC comprising;

a current detection circuit comprising;

an integrator circuit;

a comparator;

a counter; and

a latch; and

an input device comprising an input portion and a pixel,

wherein the integrator circuit is configured to integrate a potential of a first signal during a period determined by a second signal, and to output the integrated potential as a third signal,

wherein the comparator is configured to compare a potential of the third signal with a first potential, and to output a fourth signal,

wherein the counter is configured to output a number of pulses included in a fifth signal as a sixth signal during a period determined by the fourth signal, and

wherein the latch is configured to hold the sixth signal.

10. The input/output device according to claim 9, wherein the first signal is supplied from the pixel.

11. The input/output device according to claim 9, wherein the integrator circuit comprises an operational amplifier and a first capacitor.

12. The input/output device according to claim 11, wherein the integrator circuit further comprises a second capacitor.