NON-POLAR (Al,B,In,Ga)N QUANTUM WELLS

• US 20160043278A1
• Filed: 10/23/2015
• Published: 02/11/2016
• Est. Priority Date: 04/15/2002
• Status: Active Grant

• Current Assignee: Regents of the University of California (University of California)
• Original Assignee: Regents of the University of California (University of California)
• Inventors: Craven, Michael D., DenBaars, Steven P.
• Granted Patent: US 9,893,236 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: C30B 25/02 Epitaxial-layer growth
• CPC Class Codes: C30B 25/04 Pattern deposit, e.g. by using masks
• CPC Class Codes: C30B 25/105 by irradiation or electric discharge
• CPC Class Codes: C30B 25/18 characterised by the substrate
• CPC Class Codes: C30B 29/403 AIII-nitrides
• CPC Class Codes: C30B 29/406 Gallium nitride
• CPC Class Codes: C30B 29/605 Products containing multiple oriented crystallites, e.g. columnar crystallites
• CPC Class Codes: H01L 21/0237 Materials
• CPC Class Codes: H01L 21/0242 Crystalline insulating materials
• CPC Class Codes: H01L 21/02433 Crystal orientation
• CPC Class Codes: H01L 21/02458 Nitrides
• CPC Class Codes: H01L 21/02516 Crystal orientation
• CPC Class Codes: H01L 21/0254 Nitrides
• CPC Class Codes: H01L 21/0262 Reduction or decomposition of gaseous compounds, e.g. CVD
• CPC Class Codes: H01L 29/155 Comprising only semiconductor materials H01L29/154 takes precedence
• CPC Class Codes: H01L 29/2003 Nitride compounds
• CPC Class Codes: H01L 33/0025 comprising only AIIIBV compounds
• CPC Class Codes: H01L 33/007 comprising nitride compounds
• CPC Class Codes: H01L 33/06 within the light emitting region, e.g. quantum confinement structure or tunnel barrier
• CPC Class Codes: H01L 33/24 of the light emitting region, e.g. non-planar junction
• CPC Class Codes: H01L 33/32 : containing nitrogen
• CPC Class Codes: H01L 33/325 : characterised by the doping materials

Abstract

A method of fabricating non-polar a-plane GaN/(Al,B,In,Ga)N multiple quantum wells (MQWs). The a-plane MQWs are grown on the appropriate GaN/sapphire template layers via metalorganic chemical vapor deposition (MOCVD) with well widths ranging from 20 Å to 70 Å. The room temperature photoluminescence (PL) emission energy from the a-plane MQWs followed a square well trend modeled using self-consistent Poisson-Schrodinger (SCPS) calculations. Optimal PL emission intensity is obtained at a quantum well width of 52 Å for the a-plane MQWs.

Claims

1. A semiconductor device structure, comprising:

(a) an initial non-polar (Al,B,In,Ga)N layer in the structure, wherein the initial non-polar (Al,B,In,Ga)N layer has a growth surface for subsequent layers that is a grown surface, and the grown surface is a non-polar plane; and

(b) one or more subsequent non-polar (Al,B,In,Ga)N layers grown directly on or above the growth surface of the initial non-polar (Al,B,In,Ga)N layer;

(c) wherein the non-polar (Al,B,In,Ga)N layers form at least one non-polar (Al,B,In,Ga)N quantum well and the non-polar (Al,B,In,Ga)N quantum well has a width greater than 50 Å

for generating light at a peak photoluminescence (PL) intensity.

2. The device of claim 1, wherein the initial non-polar (Al,B,In,Ga)N layer is grown on or above a substrate.

3. The device of claim 2, wherein the initial non-polar (Al,B,In,Ga)N layer is grown on or above a nucleation layer grown on the substrate.

4. The device of claim 3, wherein the substrate is an r-plane sapphire.

5. The device of claim 1, wherein the non-polar (Al,B,In,Ga)N quantum well has a barrier layer doped with silicon.

6. The device of claim 5, wherein the silicon has a concentration of 2×

10¹⁸ cm<sup>−

3</sup>.

7. The device of claim 1, wherein the non-polar (Al,B,In,Ga)N quantum well has a width between 50 Å

and 55 Å

for generating light at a peak photoluminescence (PL) intensity.

8. The device of claim 7, wherein the non-polar (Al,B,In,Ga)N quantum well has a width of 52 Å

for generating light at a peak photoluminescence (PL) intensity.

9. The device of claim 1, wherein the non-polar (Al,B,In,Ga)N quantum well is a non-polar GaN/AlGaN quantum well.

10. A method for fabricating a semiconductor device structure, comprising:

(a) growing an initial non-polar (Al,B,In,Ga)N layer in the structure, wherein the initial non-polar (Al,B,In,Ga)N layer has a growth surface for subsequent layers that is a grown surface, and the grown surface is a non-polar plane; and

(b) growing one or more subsequent non-polar (Al,B,In,Ga)N layers directly on or above the growth surface of the initial non-polar (Al,B,In,Ga)N layer;

(c) wherein the non-polar (Al,B,In,Ga)N layers form at least one non-polar (Al,B,In,Ga)N quantum well and the non-polar (Al,B,In,Ga)N quantum well has a width greater than 50 Å

for generating light at a peak photoluminescence (PL) intensity.

11. The method of claim 10, wherein the initial non-polar (Al,B,In,Ga)N layer is grown on or above a substrate.

12. The method of claim 11, wherein the initial non-polar (Al,B,In,Ga)N layer is grown on or above a nucleation layer grown on the substrate.

13. The method of claim 12, wherein the substrate is an r-plane sapphire.

14. The method of claim 10, wherein the non-polar (Al,B,In,Ga)N quantum well has a barrier layer doped with silicon.

15. The method of claim 14, wherein the silicon has a concentration of 2×

10¹⁸ cm<sup>−

3</sup>.

16. The method of claim 10, wherein the non-polar (Al,B,In,Ga)N quantum well has a width between 50 Å

and 55 Å

for generating light at a peak photoluminescence (PL) intensity.

17. The method of claim 16, wherein the non-polar (Al,B,In,Ga)N quantum well has a width of 52 Å

for generating light at a peak photoluminescence (PL) intensity.

18. The method of claim 10, wherein the non-polar (Al,B,In,Ga)N quantum well is a non-polar GaN/AlGaN quantum well.