MEMORY DEVICE HAVING A DIFFERENT SOURCE LINE COUPLED TO EACH OF A PLURALITY OF LAYERS OF MEMORY CELL ARRAYS
First Claim
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1. A method for operating a memory device that comprises a memory array that comprises a plurality of layers of memory cells, the method comprising:
- applying a sensing voltage to a particular memory cell that is in a particular layer of the plurality of layers of memory cells; and
applying a source voltage to an end of a string of memory cells that includes the particular memory cell while applying the sensing voltage to the particular memory cell;
wherein the source voltage is based on a programming rate of the particular layer.
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Abstract
A sensing voltage may be applied to a particular memory cell that is in a particular layer of a plurality of layers of memory cells. While the sensing voltage is applied to the particular memory cell, a source voltage may be applied to an end of a string of memory cells that includes the particular memory cell. The source line voltage may be based on a programming rate of the particular layer.
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Citations
21 Claims
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1. A method for operating a memory device that comprises a memory array that comprises a plurality of layers of memory cells, the method comprising:
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applying a sensing voltage to a particular memory cell that is in a particular layer of the plurality of layers of memory cells; and applying a source voltage to an end of a string of memory cells that includes the particular memory cell while applying the sensing voltage to the particular memory cell; wherein the source voltage is based on a programming rate of the particular layer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A memory device comprising:
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a plurality of layers of memory cells; wherein the memory device is configured to cause a sensing voltage to be applied to a particular memory cell that is in a particular layer of the plurality of layers of memory cells; wherein the memory device is configured to cause a source voltage to be applied to an end of a string of memory cells that includes the particular memory cell while applying the sensing voltage to the memory cell; wherein the source voltage is based on a programming rate of the particular layer. - View Dependent Claims (12, 13, 14, 15)
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16. A memory device comprising:
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a stack of layers of memory cells, comprising; a first plurality of layers of memory cells commonly coupled to a first source; and a second plurality of layers of memory cells commonly coupled to a second source different than the first source; wherein the memory device is to bias the first source with a first source voltage and to bias the second source with a second source voltage that is different than the first source voltage. - View Dependent Claims (17, 18, 19, 20, 21)
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Specification