MEMORY CORRUPTION DETECTION

• US 20160124802A1
• Filed: 11/03/2014
• Published: 05/05/2016
• Est. Priority Date: 11/03/2014
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Gabor, Ron, Sade, Raanan, Nuzman, Joseph
• Granted Patent: US 9,858,140 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G06F 11/10 Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's

Abstract

Systems and methods for memory corruption detection. An example processing system comprises a processing core including a register to store a base address of a memory corruption detection (MCD) table. The processing core is configured to validate a pointer referenced by a memory access instruction, by comparing a first value derived from a first portion of the pointer to a second value stored in the MCD table at an offset referenced by a second portion of the pointer.

Claims

1. A processing system, comprising:

a processing core including a register to store a base address of a memory corruption detection (MCD) table;

wherein the processing core is configured to validate a pointer referenced by a memory access instruction, by comparing a first value derived from a first portion of the pointer to a second value stored in the MCD table at an offset referenced by a second portion of the pointer.

2. The processing system of claim 1, wherein the first portion of the pointer comprises a pre-defined number of upper bits of the pointer.

3. The processing system of claim 1, wherein the processing core is further configured to determine the offset by shifting the second portion of the pointer to the right by a pre-defined number of bit positions.

4. The processing system of claim 1, wherein the second portion of the pointer comprises a pre-defined number of lower bits of the pointer.

5. The processing system of claim 1, wherein the processing core is further configured to produce the first value by applying an exclusive disjunction operation to the first portion of the pointer and a third value having each bit equal to an upper bit of the first portion of the pointer.

6. The processing system of claim 1, wherein the processing core is further configured to omit pointer validation responsive to determining that the pointer is represented by a canonical form pointer.

7. The processing system of claim 1, wherein the processing core is further configured to generate a fault responsive to failing to validate the pointer.

8. The processing system of claim 1, wherein the processing core is further configured, responsive to receiving an MCD table initialization request from the application, to allocate a memory for storing the MCD table.

9. The processing system of claim 1, wherein the processing core is further configured, responsive to receiving a memory allocation request:

allocate a memory buffer;

generate an MCD value to be assigned to the memory buffer;

initialize, using the MCD value, one or more MCD table entries corresponding to one or more memory blocks comprised by the memory buffer; and

store a bit sequence derived from the MCD value within pre-defined bit positions of a pointer referencing the memory buffer.

10. The processing system of claim 1, wherein the processing system comprises a system-on-chip (SoC).

11. A method, comprising:

storing, in a register of a processing core, a base address of a memory corruption detection (MCD) table associated with an application being executed by the processing core; and

validating, by the processing core, a pointer produced by a memory access instruction of the application, by comparing a first value derived from a first portion of the pointer to a second value stored in the MCD table at an offset referenced by a second portion of the pointer.

12. The method of claim 11, wherein the first portion of the pointer comprises a pre-defined number of upper bits of the pointer.

13. The method of claim 11, wherein the validating further comprises:

determining the offset by shifting the second portion of the pointer to the right by a pre-defined number of bit positions.

14. The method of claim 11, wherein the second portion of the pointer comprises a pre-defined number of lower bits of the pointer.

15. The method of claim 11, wherein the validating further comprises:

producing the first value by applying an exclusive disjunction operation to the first portion of the pointer and a third value having each bit equal to an upper bit of the first portion of the pointer.

16. The method of claim 11, wherein the validating further comprises:

determining that the pointer is not represented by a canonical form pointer.

17. The method of claim 11, further comprising:

generating a fault responsive to failing to validate the pointer.

18. The method of claim 11, further comprising:

responsive to receiving an MCD table initialization request, allocating a memory for storing the MCD table.

19. The method of claim 11, further comprising:

responsive to receiving a memory allocation request, allocating a memory buffer;

generating an MCD value to be assigned to the memory buffer;

initializing, using the MCD value, one or more MCD table entries corresponding to one or more memory blocks comprised by the memory buffer; and

storing a bit sequence derived from the MCD value within pre-defined bit positions of a pointer referencing the memory buffer.

20. A computer-readable non-transitory storage medium comprising executable instructions that, when executed by a processor, cause the processor to:

responsive to receiving a memory allocation request, allocate a memory buffer;

generate an MCD value to be assigned to the memory buffer;

initialize, using the MCD value, one or more MCD table entries corresponding to one or more memory blocks comprised by the memory buffer; and

store a bit sequence derived from the MCD value within pre-defined bit positions of a pointer referencing the memory buffer.