METHODS, CIRCUITS, DEVICES, SYSTEMS AND MACHINE EXECUTABLE CODE FOR READING FROM A NON-VOLATILE MEMORY ARRAY
First Claim
Patent Images
1. A non-volatile memory (NVM) array control circuit comprising:
- a data reading circuit block adapted to read a set of physical memory locations on the NVM array which correspond to a set of logical memory locations requested by a host device; and
an error detection circuit block to signal the host device of one or more detected read errors substantially upon detection and prior to completing a read sequence for the requested set of logical memory locations.
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Abstract
Disclosed is a method for reading from a non-volatile memory (NVM) device including: retrieving a set of data from an NVM array according to a read sequence for a requested set of logical memory locations received from a host device, detecting errors in the set of data, preparing an error indicator to be output to a host device substantially upon detection of the errors and outputting the error indication in response to a command being received from the host device.
28 Citations
23 Claims
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1. A non-volatile memory (NVM) array control circuit comprising:
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a data reading circuit block adapted to read a set of physical memory locations on the NVM array which correspond to a set of logical memory locations requested by a host device; and an error detection circuit block to signal the host device of one or more detected read errors substantially upon detection and prior to completing a read sequence for the requested set of logical memory locations. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14)
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15. A method for reading from a non-volatile memory (NVM) device comprising:
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retrieving a set of data from an NVM array according to a read sequence for a requested set of logical memory locations received from a host device; detecting errors in said set of data; preparing an error indicator to be output to a host device; and outputting said error indication in response to a command being received from the host device. - View Dependent Claims (16, 17, 18, 19, 20)
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21. A host device associated with a primary apparatus and a non-volatile memory (NVM) device, the host device comprising:
a data controller to;
(a) provide a set of logical memory locations to the NVM device and request to read information stored in said set;
(b) receive at least a segment of said read information; and
(c) if said NVM detects an error, receive a read error indication substantially upon detection by the NVM substantially prior to completing a read sequence for the requested set of logical memory locations; and
primary apparatus control circuitry to control at least one electro-mechanical functionality of the primary apparatus dependent on a received read error indication.- View Dependent Claims (22, 23)
Specification