PARALLEL DESTAGING WITH REPLICATED CACHE PINNING

• US 20160162408A1
• Filed: 02/18/2016
• Published: 06/09/2016
• Est. Priority Date: 04/16/2013
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Chambliss, David D., Garmiza, Ehood, Shalev, Leah
• Granted Patent: US 9,535,840 B2
• Time in Patent Office: Days
• CPC Class Codes: G06F 11/1076 Parity data used in redundant arrays of independent storages, e.g. in RAID systems
• CPC Class Codes: G06F 12/0804 with main memory updating G06F12/0806 takes precedence
• CPC Class Codes: G06F 12/0833 in combination with broadcast means (e.g. for invalidation or updating)
• CPC Class Codes: G06F 12/0868 Data transfer between cache memory and other subsystems, e.g. storage devices or host systems
• CPC Class Codes: G06F 12/126 with special data handling, e.g. priority of data or instructions, handling errors or pinning
• CPC Class Codes: G06F 12/128 adapted to multidimensional cache systems, e.g. set-associative, multicache, multiset or multilevel
• CPC Class Codes: G06F 2211/1057 Parity-multiple bits-RAID6, i.e. RAID 6 implementations
• CPC Class Codes: G06F 2212/621 Coherency control relating to peripheral accessing, e.g. from DMA or I/O device

Abstract

Methods, apparatus and computer program products implement embodiments of the present invention that include identifying non-destaged first data in a write cache. Upon detecting second data in a master read cache, the second data is pinned to the master and one or more backup read caches. Using the first data stored in the write cache and the second data stored in the master read cache, one or more parity values are calculated, and the first data and the one or more parity values are destaged.

Claims

1. A method, comprising:

identifying non-destaged first data in a write cache; and

upon detecting second data in a master read cache;

pinning the second data to the master and one or more backup read caches;

calculating, using the first data stored in the write cache and the second data stored in the master read cache, one or more parity values; and

destaging the first data and the one or more parity values.

2. The method according to claim 1, wherein detecting the second data comprises retrieving the second data from a data storage device, and storing the retrieved second data to the master read cache.

3. The method according to claim 1, wherein detecting the second data comprises locating the second data in the master read cache.

4. The method according to claim 1, wherein destaging the first data and the one or more parity values comprises transferring the first data from the write cache to a data storage device, and storing the one or more parity values to one or more corresponding parity storage devices.

5. The method according to claim 4, and comprising upon recovering from a storage system failure, recalculating, using the first data stored in the write cache and the second data stored in the master read cache, one or more parity values, and destaging the first data and the one or more parity values.

6. The method according to claim 1, and comprising identifying the second data in the write cache, calculating, using the first and the second data stored in the write cache, one or more parity values, storing the one or more parity values to the write cache, and destaging the first data, the second data and the one or more parity values.

7. The method according to claim 6, wherein destaging the first data, the second data and the one or more parity values comprises transferring, from the write cache, the first data to a first data storage device and the second data to a second data storage device, and storing the one or more parity values to one or more corresponding parity storage devices.

8. The method according to claim 6, wherein the first data, the second data and the one or more parity values are destaged in parallel.

9. The method according to claim 1, and comprising unpinning the second data from the master and the backup read caches upon destaging the first data and the one or more parity values.

10. The method according to claim 1, wherein the write cache comprises a master write cache having one or more backup write caches.

11. A storage system, comprising:

a memory configured to store data in a master read cache, a master write cache, at least one backup read cache, and at least one backup write cache; and

a processor configured to identify non-destaged first data in the write cache, and upon detecting second data in a master read cache, to pin the second data to the master and one or more backup read caches, to calculate, using the first data stored in the master write cache and the second data stored in the master read cache, one or more parity values, and to destage the first data and the one or more parity values.

12. The storage system according to claim 11 wherein the processor is configured to detect the second data comprises by the second data from a data storage device, and storing the retrieved second data to the master read cache.

13. The storage system according to claim 11, wherein the processor is configured to detect the second data by locating the second data in the master read cache.

14. The storage system according to claim 11, wherein the processor is configured to destage the first data and the one or more parity values by transferring the first data from the write cache to a data storage device, and storing the one or more parity values to one or more corresponding parity storage devices.

15. The storage system according to claim 14, wherein upon recovering from a storage system failure, the processor is configured to recalculate, using the first data stored in the write cache and the second data stored in the master read cache, one or more parity values, and to destage the first data and the one or more parity values.

16. The storage system according to claim 11, wherein the processor is configured to identify the second data in the write cache, to calculate, using the first and the second data stored in the write cache, one or more parity values, to store the one or more parity values to the write cache, and to destage the first data, the second data and the one or more parity values.

17. The storage system according to claim 16, wherein the processor is configured to destage the first data, the second data and the one or more parity values by transferring, from the write cache, the first data to a first data storage device, the second data to a second data storage device, and storing the one or more parity values to one or more corresponding parity storage devices.

18. The storage system according to claim 16, wherein the processor is configured to destage, in parallel, the first data, the second data and the one or more parity values

19. The storage system according to claim 11, wherein the processor is configured to unpin the second data from the master and the backup read caches upon destaging the first data and the one or more parity values.

20. A computer program product, the computer program product comprising:

a non-transitory computer readable storage medium having computer readable program code embodied therewith, the computer readable program code comprising;

computer readable program code configured to identify non-destaged first data in a write cache; and

computer readable program code configured, upon detecting second data in a master read cache, to pin the second data to the master and one or more backup read caches, to calculate, using the first data stored in the write cache and the second data stored in the master read cache, one or more parity values, and to destage the first data and the one or more parity values.