FLASH MEMORY, FLASH MEMORY SYSTEM AND OPERATING METHOD OF THE SAME

• US 20160225458A1
• Filed: 04/14/2016
• Published: 08/04/2016
• Est. Priority Date: 01/14/2013
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: KIM, KYUNG-RYUN, YOON, SANG-YONG
• Granted Patent: US 9,812,213 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G11C 11/5642 Sensing or reading circuits; Data output circuits
• CPC Class Codes: G11C 16/0483 comprising cells having several storage transistors connected in series
• CPC Class Codes: G11C 16/28 using differential sensing or reference cells, e.g. dummy cells

Abstract

A flash memory, a flash memory system, and an operating method thereof. The method of operating a flash memory includes counting the number of memory cells having threshold voltages included in a first adjacent threshold voltage range (defined by a first reference read voltage for distinguishing between initially separated adjacently located threshold voltage distributions and a first search read voltage having a first voltage difference from the first reference read voltage), and a second adjacent threshold voltage range (defined by the first reference read voltage and a second search read voltage having a second voltage difference from the first reference read voltage), and setting a first optimal read voltage based on the difference between the first and second counted numbers of the memory cells.

Claims

1. A method of operating a flash memory, the method comprising:

counting the number of memory cells having threshold voltages included in a first adjacent threshold voltage range defined by a first reference read voltage for discriminating between a first pair of threshold voltage distributions adjacently located and a first search read voltage having a first voltage difference with the first reference read voltage;

counting the number of memory cells having threshold voltages included in a second adjacent threshold voltage range defined by the first reference read voltage and a second search read voltage having a second voltage difference with the first reference read voltage; and

setting a first optimal read voltage based on a count difference between the counted number of the memory cells having the threshold voltages included in the first adjacent threshold voltage range and the counted number of the memory cells having the threshold voltages included in the second adjacent threshold voltage range.