PIXEL STRUCTURE HAVING HIGH APERTURE RATIO AND CIRCUIT
First Claim
1. A pixel structure having high aperture ratio, comprising a substrate, a first gate and a second gate, located at one side of the substrate;
- a gate isolation layer, located on the first, the second gates and the gate isolation layer, and the gate isolation layer completely covers the first gate and the substrate, and exposes two ends of the second gate;
a first semiconductor layer, located on the gate isolation layer and right over the first gate;
a second semiconductor layer, located on the gate isolation layer and right over the second gate;
an etching stopper layer, located on the first, the second semiconductor layer and the gate isolation layer;
a first source/a first drain, located on the first semiconductor layer and the etching stopper layer;
a second source/a second drain, located on the second semiconductor layer and the etching stopper layer, and the first source/the first drain are connected to the first semiconductor layer and one end of the second gate, and the second source/the second drain are connected to the second semiconductor layer;
a protective layer, located on the first source/the first drain, the second source/the second drain and the etching stopper layer;
a transparent electrode, located on the protective layer and at the other side of the substrate, and the transparent electrode is connected to the other end of the second gate;
a flat isolation layer, located on the protective layer and the transparent electrode;
a pixel electrode, located on the flat isolation layer, and the pixel electrode is connected to the second source/the second drain and overlaps with the transparent electrode;
a pixel definition layer, located on the flat isolation layer and the pixel electrode, and the pixel definition layer comprises an open corresponding to an overlapping district of the pixel electrode and the transparent electrode;
the first gate, the first source/the first drain, and the etching stopper layer, the first semiconductor layer, the gate isolation layer sandwiched in-between construct a first thin film transistor;
the second gate, the second source/the second drain, and the etching stopper layer, the second semiconductor layer, the gate isolation layer sandwiched in between construct a second thin film transistor;
the transparent electrode, the pixel electrode and the flat isolation layer sandwiched in-between construct a transparent capacitor.
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Abstract
The present invention provides a pixel structure having high aperture ratio and circuit. The first gate (21), the first source/the first drain (61), and the etching stopper layer (5), the first semiconductor layer (41), the gate isolation layer (3) sandwiched in-between of the pixel structure having high aperture ratio construct a first thin film transistor (TFT1); the second gate (22), the second source/the second drain (62), and the etching stopper layer (5), the second semiconductor layer (42), the gate isolation layer (3) sandwiched in between construct a second thin film transistor (TFT2); the transparent electrode (8), the pixel electrode (10) and the flat isolation layer (9)sandwiched in-between construct a transparent capacitor (C), and the transparent capacitor (C) constructs an activation area part of the pixel structure which is capable of increasing the activation area of the pixel and raising the aperture ratio to increase the display brightness and reduce the power consumption.
18 Citations
11 Claims
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1. A pixel structure having high aperture ratio, comprising a substrate, a first gate and a second gate, located at one side of the substrate;
- a gate isolation layer, located on the first, the second gates and the gate isolation layer, and the gate isolation layer completely covers the first gate and the substrate, and exposes two ends of the second gate;
a first semiconductor layer, located on the gate isolation layer and right over the first gate;
a second semiconductor layer, located on the gate isolation layer and right over the second gate;
an etching stopper layer, located on the first, the second semiconductor layer and the gate isolation layer;
a first source/a first drain, located on the first semiconductor layer and the etching stopper layer;
a second source/a second drain, located on the second semiconductor layer and the etching stopper layer, and the first source/the first drain are connected to the first semiconductor layer and one end of the second gate, and the second source/the second drain are connected to the second semiconductor layer;
a protective layer, located on the first source/the first drain, the second source/the second drain and the etching stopper layer;
a transparent electrode, located on the protective layer and at the other side of the substrate, and the transparent electrode is connected to the other end of the second gate;
a flat isolation layer, located on the protective layer and the transparent electrode;
a pixel electrode, located on the flat isolation layer, and the pixel electrode is connected to the second source/the second drain and overlaps with the transparent electrode;
a pixel definition layer, located on the flat isolation layer and the pixel electrode, and the pixel definition layer comprises an open corresponding to an overlapping district of the pixel electrode and the transparent electrode;the first gate, the first source/the first drain, and the etching stopper layer, the first semiconductor layer, the gate isolation layer sandwiched in-between construct a first thin film transistor;
the second gate, the second source/the second drain, and the etching stopper layer, the second semiconductor layer, the gate isolation layer sandwiched in between construct a second thin film transistor;
the transparent electrode, the pixel electrode and the flat isolation layer sandwiched in-between construct a transparent capacitor. - View Dependent Claims (2, 3, 4, 5, 6, 7)
- a gate isolation layer, located on the first, the second gates and the gate isolation layer, and the gate isolation layer completely covers the first gate and the substrate, and exposes two ends of the second gate;
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8. A circuit of a pixel structure having high aperture ratio, comprising a first thin film transistor, a second thin film transistor, a transparent capacitor, and a light emitting diode, and both two electrodes constructing the transparent capacitor are transparent electrodes;
- a gate of the first thin film transistor is coupled to a gate drive voltage signal, and a source thereof is coupled to a data drive voltage signal, and a drain thereof and a gate of the second thin film transistor are coupled;
a source of the second thin film transistor is coupled to a drive voltage signal, and a drain thereof is coupled to an anode of the organic light emitting diode;
a cathode of the organic light emitting diode is coupled to a ground signal;
one electrode of the transparent capacitor is coupled to the gate of the second thin film transistor, and the other electrode thereof is coupled to the source or the drain of the second thin film transistor. - View Dependent Claims (9, 10)
- a gate of the first thin film transistor is coupled to a gate drive voltage signal, and a source thereof is coupled to a data drive voltage signal, and a drain thereof and a gate of the second thin film transistor are coupled;
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11. A circuit of a pixel structure having high aperture ratio, comprising a first thin film transistor, a second thin film transistor, a transparent capacitor, and a light emitting diode, and both two electrodes constructing the transparent capacitor are transparent electrodes;
- a gate of the first thin film transistor is coupled to a gate drive voltage signal, and a source thereof is coupled to a data drive voltage signal, and a drain thereof and a gate of the second thin film transistor are coupled;
a source of the second thin film transistor is coupled to a drive voltage signal, and a drain thereof is coupled to an anode of the organic light emitting diode;
a cathode of the organic light emitting diode is coupled to a ground signal;
one electrode of the transparent capacitor is coupled to the gate of the second thin film transistor, and the other electrode thereof is coupled to the source or the drain of the second thin film transistor;the circuit of the pixel structure having high aperture ratio further comprises an opaque capacitor, and one electrode of the opaque capacitor is coupled to the gate of the second thin film transistor, and the other electrode thereof is coupled to the source or the drain of the second thin film transistor; wherein the source, the drain of the first thin film transistor are switchable, and the source, the drain of the second thin film transistor are switchable, too.
- a gate of the first thin film transistor is coupled to a gate drive voltage signal, and a source thereof is coupled to a data drive voltage signal, and a drain thereof and a gate of the second thin film transistor are coupled;
Specification