BACK SIDE VIA VERTICAL OUTPUT COUPLERS

• US 20160306111A1
• Filed: 04/20/2016
• Published: 10/20/2016
• Est. Priority Date: 04/20/2015
• Status: Active Grant

• Current Assignee: Skorpios Technologies Inc.
• Original Assignee: Skorpios Technologies Inc.
• Inventors: Lambert, Damien
• Granted Patent: US 10,132,996 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: G02B 2006/12061 Silicon
• CPC Class Codes: G02B 2006/12097 Ridge, rib or the like
• CPC Class Codes: G02B 2006/12104 Mirror; Reflectors or the like
• CPC Class Codes: G02B 2006/12147 Coupler
• CPC Class Codes: G02B 2006/12169 Annealing
• CPC Class Codes: G02B 6/125 Bends, branchings or intersections
• CPC Class Codes: G02B 6/132 by deposition of thin films
• CPC Class Codes: G02B 6/136 by etching
• CPC Class Codes: G02B 6/4214 the intermediate optical element having redirecting reflective means, e.g. mirrors, prisms for deflecting the radiation from horizontal to down- or upward direction toward a device G02B6/4246 takes precedence

Abstract

A method forms a vertical output coupler for a waveguide, formed of waveguide material and disposed within a layer stack on a top surface of a wafer. The method includes etching through a portion of the wafer to form a via that exposes the waveguide material, and etching the waveguide material to remove at least a first portion of the waveguide. The etching forms a tilted plane in the waveguide material. The method further includes coating the first tilted plane with one or more reflective layers, to form a tilted mirror in contact with the first tilted plane in the waveguide material. The tilted mirror forms the vertical output coupler such that light propagating through the waveguide is deflected by the tilted mirror, and exits the waveguide.

Claims

1. A method of forming a vertical output coupler for a waveguide, the waveguide being formed of a waveguide material that is disposed within a layer stack on a front surface of a wafer, the method comprising:

defining a via photoresist mask on a back surface of the wafer, wherein the via photoresist mask exposes a via shape on the back surface of the wafer and protects other surfaces of the back surface of the wafer;

etching through a portion of the wafer where the via shape is exposed, to form a via that exposes the waveguide material;

etching the waveguide material to remove at least a first portion of the waveguide, wherein etching the waveguide material forms at least a first tilted plane in the waveguide material;

removing the via photoresist mask; and

coating the first tilted plane with one or more reflective layers, to form a tilted mirror in contact with the first tilted plane in the waveguide material,

wherein the tilted mirror forms the vertical output coupler such that light propagating through the waveguide is deflected by the tilted mirror, exiting the waveguide.

2. The method of claim 1, further comprising forming an antireflective coating on the front surface of the wafer such that the light deflected by the tilted mirror passes through the antireflective coating.

3. The method of claim 2, wherein the antireflective coating is formed on the waveguide before the step of etching the waveguide material.

4. The method of claim 2, further comprising depositing a top side protective layer over the antireflective coating.

5. The method of claim 2, wherein the layer stack includes a cladding layer atop the waveguide;

further comprising etching a recess in the cladding layer to expose the waveguide before forming the antireflective coating;

and wherein defining the photoresist mask comprises registering the via shape with the recess so that when etched, the tilted mirror forms within lateral and horizontal bounds of the recess.

6. The method of claim 5, further comprising:

depositing a top side protective layer over the antireflective coating; and

removing the top side protective layer within at least part of the recess, so as to expose the antireflective coating.

7. The method of claim 1, wherein the one or more reflective layers include a liner comprising at least one of tantalum, tantalum nitride and titanium nitride.

8. The method of claim 1, wherein the one or more reflective layers include a filler comprising at least one of copper and aluminum.

9. The method of claim 8, wherein the filler substantially fills the via.

10. The method of claim 1, further comprising depositing a back side protective layer on the back surface of the wafer, and wherein etching through the portion of the wafer where the via shape is exposed comprises etching through the back side protective layer.

11. The method of claim 1, wherein a plurality of waveguides are formed of the waveguide material, and wherein two or more of the plurality of waveguides intersect the via so as to form two or more vertical couplers.

12. The method of claim 1, further defining forming the waveguide by photolithography and etching of the waveguide material.

13. The method of claim 12, wherein the photolithography and etching that form the waveguide are repeated, and wherein one instance of the etching does not completely clear the waveguide material, so as to leave a partial thickness shoulder of the waveguide material within an area of the wafer where the via will be formed.

14. The method of claim 13, wherein the partial thickness shoulder comprises a thickness of the waveguide material within the range of 100 Å

to 3000 Å

.