Semiconductor Component Arrangement Comprising a Trench Transistor

• US 20160307889A1
• Filed: 06/30/2016
• Published: 10/20/2016
• Est. Priority Date: 03/07/2006
• Status: Active Grant

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Zundel, Markus, Hirler, Franz, Krischke, Norbert
• Granted Patent: US 9,941,276 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H01L 21/02233 of the semiconductor substrate or a semiconductor layer
• CPC Class Codes: H01L 21/02255 formation by thermal treatment H01L21/02252 takes precedence; after treatment of an insulating film H01L21/3105 and subgroups
• CPC Class Codes: H01L 21/32105 Oxidation of silicon-containing layers
• CPC Class Codes: H01L 21/743 Making of internal connections, substrate contacts
• CPC Class Codes: H01L 21/823437 with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
• CPC Class Codes: H01L 27/0629 in combination with diodes, or resistors, or capacitors
• CPC Class Codes: H01L 27/0733 in combination with capacitors only
• CPC Class Codes: H01L 28/40 Capacitors
• CPC Class Codes: H01L 28/60 Electrodes
• CPC Class Codes: H01L 29/0696 of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
• CPC Class Codes: H01L 29/0865 Disposition
• CPC Class Codes: H01L 29/0878 Impurity concentration or distribution
• CPC Class Codes: H01L 29/1095 Body region, i.e. base region, of DMOS transistors or IGBTs cell layout H01L29/0696
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/41766 with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor H01L29/41733 - H01L29/41758 take precedence
• CPC Class Codes: H01L 29/4236 within a trench, e.g. trench gate electrode, groove gate electrode
• CPC Class Codes: H01L 29/66704 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/66712 Vertical DMOS transistors, i.e. VDMOS transistors
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7803 structurally associated with at least one other device assemblies H01L25/00; integrated circuits H01L27/00
• CPC Class Codes: H01L 29/7804 : the other device being a pn-junction diode
• CPC Class Codes: H01L 29/7809 : having both source and drain contacts on the same surface, i.e. Up-Drain VDMOS transistors
• CPC Class Codes: H01L 29/7811 : with an edge termination structure guard regions per se H01L29/0619; field plates per se H01L29/402
• CPC Class Codes: H01L 29/7813 : with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236
• CPC Class Codes: H01L 29/7816 : Lateral DMOS transistors, i.e. LDMOS transistors
• CPC Class Codes: H01L 29/7823 : with an edge termination structure guard regions per se H01L29/0619; field plates per se H01L29/402
• CPC Class Codes: H01L 29/7825 : with trench gate electrode trench gate electrodes per se H01L29/4236
• CPC Class Codes: H01L 29/945 : Trench capacitors

Abstract

A semiconductor component arrangement method includes producing a trench transistor structure including at least one trench disposed in the semiconductor body and at least one gate electrode disposed in the at least one trench. The method also includes producing a capacitor structure comprising an electrode structure disposed in at least one further trench, the electrode structure comprising at least one electrode. The gate electrode and the at least one electrode of the electrode structure are produced by common process steps.

Claims

1. A method for producing a semiconductor component arrangement, the method comprising:

producing a trench transistor structure including at least one trench disposed in the semiconductor body and at least one gate electrode disposed in the at least one trench;

producing a capacitor structure comprising an electrode structure disposed in at least one further trench, the electrode structure comprising at least one electrode; and

wherein the gate electrode and the at least one electrode of the electrode structure are produced by common process steps.

2. The method of claim 1, wherein the at least one trench of the transistor structure and the at least one further trench are produced by common process steps.

3. The method of claim 1, further comprising:

producing at least one field electrode of the trench transistor structure in the at least one trench; and

producing the electrode structure to comprise at least two electrodes; and

wherein the at least two electrodes of the electrode structure and the at least one gate electrode and the at least one field electrode are produced by common process steps.

4. The method of claim 1, wherein the at least one trench of the trench transistor structure and the at least one further trench are produced to have different trench widths.

5. The method of claim 1, wherein prior to producing the at least one gate electrode of the trench transistor structure and prior to producing the at least one electrode of the electrode structure, a dielectric layer is produced on surfaces of the at least one further trench.

6. The method of claim 1, wherein the trench transistor structure comprises a body zone and a source zone which are adjacent to the at least one trench of the trench transistor structure, wherein the body zone and the source zone are produced after producing the at least one gate electrode.

7. The method of claim 5, wherein producing the dielectric layer on surfaces of the at least one further trench comprises:

thermally oxidizing the surfaces of the at least one further trench; and

protecting the trench transistor structure against an oxidation by a protection layer during said thermal oxidation step.

8. The method of claim 7, further comprising:

producing a gate dielectric on surfaces of the at least one trench after the removal of the protection layer.