BUFFERING DATA TO BE WRITTEN TO AN ARRAY OF NON-VOLATILE STORAGE DEVICES
First Claim
Patent Images
1. A method of buffering data to be written to an array of non-volatile storage devices in a multi-array system, the method comprising:
- receiving, by a storage array controller in a first storage array, a request to write data to non-volatile storage devices in the first storage array;
sending, from the storage array controller in the first storage array to a non-volatile random access memory (‘
NVRAM’
) storage device in the first storage array, an instruction to write the data to dynamic random access memory (‘
DRAM’
) in the NVRAM storage device in the first storage array, wherein;
the DRAM is configured to receive power from a primary power source, and the DRAM is further configured to receive power from a backup power source in response to the primary power source failing;
the NVRAM storage device in the first storage array is available for exclusive use by one or more storage array controllers in the first storage array; and
the multi-array system includes a second storage array that includes a plurality of non-volatile storage devices and an NVRAM storage device in the second storage array, the NVRAM storage device in the second storage array available for exclusive use by one or more storage array controllers in the second storage array;
writing the data to the DRAM in the NVRAM storage device in the first storage array.
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Accused Products
Abstract
Buffering data to be written to an array of non-volatile storage devices, including: receiving a request to write data to the array of non-volatile storage devices; sending, to a non-volatile random access memory (‘NVRAM’) device, an instruction to write the data to dynamic random access memory (‘DRAM’) in the NVRAM device, the DRAM configured to receive power from a primary power source, the DRAM further configured to receive power from a backup power source in response to the primary power source failing; and writing the data to the DRAM in the NVRAM device.
328 Citations
18 Claims
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1. A method of buffering data to be written to an array of non-volatile storage devices in a multi-array system, the method comprising:
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receiving, by a storage array controller in a first storage array, a request to write data to non-volatile storage devices in the first storage array; sending, from the storage array controller in the first storage array to a non-volatile random access memory (‘
NVRAM’
) storage device in the first storage array, an instruction to write the data to dynamic random access memory (‘
DRAM’
) in the NVRAM storage device in the first storage array, wherein;the DRAM is configured to receive power from a primary power source, and the DRAM is further configured to receive power from a backup power source in response to the primary power source failing; the NVRAM storage device in the first storage array is available for exclusive use by one or more storage array controllers in the first storage array; and the multi-array system includes a second storage array that includes a plurality of non-volatile storage devices and an NVRAM storage device in the second storage array, the NVRAM storage device in the second storage array available for exclusive use by one or more storage array controllers in the second storage array; writing the data to the DRAM in the NVRAM storage device in the first storage array. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A system for buffering data to be written to an array of non-volatile storage devices in a multi-array system, the system configured to carry out the steps of:
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receiving, by a storage array controller in a first storage array, a request to write data to non-volatile storage devices in the first storage array; sending, from the storage array controller in the first storage array to a non-volatile random access memory (‘
NVRAM’
) storage device in the first storage array, an instruction to write the data to dynamic random access memory (‘
DRAM’
) in the NVRAM storage device in the first storage array, wherein;the DRAM is configured to receive power from a primary power source, and the DRAM is further configured to receive power from a backup power source in response to the primary power source failing; the NVRAM storage device in the first storage array is available for exclusive use by one or more storage array controllers in the first storage array; and the multi-array system includes a second storage array that includes a plurality of non-volatile storage devices and an NVRAM storage device in the second storage array, the NVRAM storage device in the second storage array available for exclusive use by one or more storage array controllers in the second storage array; writing the data to the DRAM in the NVRAM storage device in the first storage array. - View Dependent Claims (8, 9, 10, 11, 12)
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13. A non-volatile random access memory (‘
- NVRAM’
) storage device for buffering data to be written to an array of non-volatile storage devices, the NVRAM device including;one or more data communications ports; one or more dynamic random access memory (‘
DRAM’
) memory modules;a primary power source configured to provide power to the DRAM memory modules; a backup power source configured to provide power to the DRAM memory modules upon a failure of the primary power source, wherein the NVRAM storage device is included in a first storage array in a multi-array system, the multi-array system including second storage array that includes a plurality of non-volatile storage devices and an NVRAM storage device in the second storage array, the NVRAM storage device in the second storage array available for exclusive use by one or more storage array controllers in the second storage array; and an NVRAM controller, the NVRAM controller configured to carry out the steps of; receiving, from a storage array controller in the first storage array via the one or more data communications ports, an instruction to write data to the one or more DRAM memory modules; and writing the data to the one or more DRAM memory modules. - View Dependent Claims (14, 15, 16, 17, 18)
- NVRAM’
Specification