MEMS Pressure Sensor and Microphone Devices Having Through-Vias and Methods of Forming Same

• US 20170001859A1
• Filed: 09/14/2016
• Published: 01/05/2017
• Est. Priority Date: 03/14/2013
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Cheng, Chun-Wen, Chu, Chia-Hua
• Granted Patent: US 10,017,378 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: B81B 2201/0257 Microphones or microspeakers
• CPC Class Codes: B81B 2201/0264 Pressure sensors
• CPC Class Codes: B81B 7/007 Interconnections between the MEMS and external electrical signals
• CPC Class Codes: B81C 1/00238 Joining a substrate with an electronic processing unit and a substrate with a micromechanical structure
• CPC Class Codes: B81C 1/00301 Connecting electric signal lines from the MEMS device with external electrical signal lines, e.g. through vias
• CPC Class Codes: B81C 2201/019 Bonding or gluing multiple substrate layers
• CPC Class Codes: B81C 2203/0792 Forming interconnections between the electronic processing unit and the micromechanical structure

Abstract

A method embodiment includes providing a MEMS wafer. A portion of the MEMS wafer is patterned to provide a first membrane for a microphone device and a second membrane for a pressure sensor device. A carrier wafer is bonded to the MEMS wafer. The carrier wafer is etched to expose the first membrane and a first surface of the second membrane to an ambient environment. A MEMS structure is formed in the MEMS wafer. A cap wafer is bonded to a side of the MEMS wafer opposing the carrier wafer to form a first sealed cavity including the MEMS structure and a second sealed cavity including a second surface of the second membrane for the pressure sensor device. The cap wafer comprises an interconnect structure. A through-via electrically connected to the interconnect structure is formed in the cap wafer.

Claims

1. A micro-electromechanical (MEMS) device comprising:

a MEMS chip comprising;

a first conductive layer comprising a first membrane for a microphone device;

a first MEMS structure and a second MEMS structure over the first conductive layer, wherein the first MEMS structure is disposed over the first membrane; and

a second conductive layer comprising a second membrane for a pressure sensor device, wherein the second membrane is disposed over the first MEMS structure;

a carrier chip bonded to the MEMS chip, the carrier chip comprising a cavity exposed to an ambient environment, wherein the cavity includes the first membrane and a first surface of the second membrane; and

a cap chip bonded to a surface of the MEMS chip opposing the carrier chip, and wherein the cap chip and the MEMS chip define a second sealed cavity and a third sealed cavity, and wherein;

the second MEMS structure is disposed in the second sealed cavity; and

a second surface of the second membrane is exposed to a sealed pressure level of the third sealed cavity.

2. The MEMS device of claim 1, wherein the cap chip further comprises:

an interconnect structure disposed on a substrate; and

a through-via extending through the substrate and electrically connected to the interconnect structure.

3. The MEMS device of claim 2, wherein the through-via comprises an opening separating opposing sidewalls of the through-via in a cross-sectional view of the MEMS device.

4. The MEMS device of claim 3 further comprising a dielectric layer disposed between a bottom surface of the through via and a surface of the substrate opposing the interconnect structure.

5. The MEMS device of claim 2, wherein the second sealed cavity extends into the substrate.

6. The MEMS device of claim 1, wherein the MEMS chip further comprises a third MEMS structure, wherein the cap chip and the MEMS chip define a fourth sealed cavity, and wherein the third MEMS structure is disposed in the fourth sealed cavity.

7. The MEMS device of claim 1, wherein the cap chip comprises an anti-stiction bump disposed over the second MEMS structure in the second sealed cavity.

8. A package comprising:

a device chip, wherein the device chip comprises;

a first conductive layer comprising a first membrane for a first device;

a first micro-electromechanical (MEMS) structure over and aligned with the first membrane; and

a second conductive layer comprising a second membrane for a second device different than the first device, wherein the second membrane is disposed over and aligned with the first MEMS structure, and wherein opposing surfaces of the second membrane are exposed to different pressure levels; and

a cap bonded to the device chip, wherein the cap comprises;

a substrate;

interconnect structures disposed between the substrate and the device chip; and

through-vias extending through the substrate and electrically connected to the interconnect structures.

9. The package of claim 8, wherein the cap and the device chip define a first sealed cavity, and wherein a first surface of the second membrane is exposed to a sealed pressure level of the first sealed cavity.

10. The package of claim 8, wherein the first conductive layer comprises a third membrane for a third device different than the first device and the second device, wherein the device chip comprises a second MEMS structure over and aligned with the third membrane.

11. The package of claim 10, wherein the cap and the device chip define a second sealed cavity, and wherein a surface of the third membrane is exposed to a sealed pressure level of the second sealed cavity.

12. The package of claim 8 further comprising a carrier bonded to an opposing side of the device chip as the cap, wherein the carrier comprises an opening extending through the carrier and exposing a second surface of the second membrane to ambient pressure.

13. The package of claim 8, wherein the first MEMS structure is freely moveable along at least one axis.

14. The package of claim 8, wherein the first device is a microphone, and wherein the second device is a pressure sensor.

15. A device comprising:

a device chip comprising;

a conductive layer providing a first membrane for a first device and a second membrane for a second device different than the first device;

a first micro-electromechanical (MEMS) structure over and aligned with the first membrane; and

a second MEMS structure over and aligned with the second membrane; and

a carrier bonded to the device chip, wherein the carrier exposes a first surface of the first membrane and a second surface of the second membrane to ambient pressure; and

a cap bonded to an opposing surface of the device chip as the carrier, wherein the cap comprises a through via extending through a substrate, and wherein the cap and the device chip define;

a first sealed cavity extending into the substrate, wherein the first MEMS structure and a third surface of the first membrane are disposed in the first sealed cavity; and

a second sealed cavity extending into the substrate, wherein the second MEMS structure and a fourth surface of the second membrane are disposed in the second sealed cavity.

16. The device of claim 15, wherein the cap further comprises an interconnect structure disposed between the substrate and the device chip, wherein the through via is electrically connected to the interconnect structure.

17. The device of claim 15, wherein the conductive layer further provides a third membrane for a third device different than the first device and the second device, wherein the device chip further comprises a third MEMS structure over and aligned with the third membrane, and wherein the cap and the device chip further define a third sealed cavity, the third MEMS structure and a fifth surface of the third membrane are disposed in the third sealed cavity.

18. The device of claim 17, wherein the cap further comprises a dielectric layer patterned to provide anti-stiction bumps in the third sealed cavity.

19. The device of claim 17, wherein a first pressure level in the first sealed cavity is substantially the same as a second pressure level of the second sealed cavity.

20. The device of claim 15, wherein the carrier comprises:

a first through hole exposing the first surface of the first membrane to ambient pressure; and

a second through hole exposing the second surface of the first membrane to ambient pressure.