DUAL-OUTPUT ASYNCHRONOUS POWER CONVERTER CIRCUITRY

• US 20170006544A1
• Filed: 04/29/2016
• Published: 01/05/2017
• Est. Priority Date: 07/01/2015
• Status: Active Grant

• Current Assignee: Qorvo US, Inc. (Qorvo, Inc.)
• Original Assignee: RF Micro Devices Incorporated (Qorvo, Inc.)
• Inventors: Khlat, Nadim, Kay, Michael R.
• Granted Patent: US 9,948,240 B2
• Time in Patent Office: Days
• US Class Current: 1/1
• CPC Class Codes: H02M 1/14 Arrangements for reducing ripples from dc input or output
• CPC Class Codes: H03F 1/02 Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
• CPC Class Codes: H03F 1/0227 using supply converters
• CPC Class Codes: H03F 1/0233 by using a signal derived from the output signal, e.g. bootstrapping the voltage supply
• CPC Class Codes: H03F 2200/102 A non-specified detector of a signal envelope being used in an amplifying circuit
• CPC Class Codes: H03F 2200/105 A non-specified detector of the power of a signal being used in an amplifying circuit
• CPC Class Codes: H03F 2200/111 the amplifier being a dual or triple band amplifier, e.g. 900 and 1800 MHz, e.g. switched or not switched, simultaneously or not
• CPC Class Codes: H03F 2200/451 the amplifier being a radio frequency amplifier
• CPC Class Codes: H03F 2200/48 the output of the amplifier being coupled out by a capacitor
• CPC Class Codes: H03F 2203/21181 the supply current of a power amplifier being continuously controlled, e.g. by controlling current sources or resistors
• CPC Class Codes: H03F 3/19 with semiconductor devices only
• CPC Class Codes: H03F 3/195 in integrated circuits
• CPC Class Codes: H03F 3/245 with semiconductor devices only
• CPC Class Codes: H03F 3/68 Combinations of amplifiers, e.g. multi-channel amplifiers for stereophonics power amplifiers using a combination of several semiconductor amplifiers H03F3/211; combinations of amplifiers using coupling networks with distributed constants H03F3/602
• CPC Class Codes: H04B 1/04 Circuits
• CPC Class Codes: H04W 52/0209 in terminal devices terminal devices per se H04W88/02
• CPC Class Codes: H04W 88/06 adapted for operation in multiple networks or having at least two operational modes, e.g. multi-mode terminals
• CPC Class Codes: Y02D 30/70 in wireless communication networks

Abstract

Dual-output power converter circuitry includes an input node, a first output node, a second output node, a number of capacitive elements, and a number of switching elements. The switching elements are coupled between the input node, the first output node, the second output node, and the capacitive elements. In operation, the switching elements charge and discharge the capacitive elements such that a power supply output voltage is provided asynchronously to the first output node and the second output node.

Claims

1. Dual-output power converter circuitry comprising:

an input node;

a first output node;

a second output node;

a plurality of capacitive elements; and

a plurality of switching elements coupled between the input node, the first output node, the second output node, and the plurality of capacitive elements, wherein the dual-output power converter circuitry is configured to receive a supply voltage at the input node and selectively charge and discharge the plurality of capacitive elements from the supply voltage using the plurality of switching elements such that a power converter output voltage is asynchronously provided to the first output node and the second output node.

2. The dual-output power converter circuitry of claim 1 wherein the power converter output voltage is greater than the supply voltage.

3. The dual-output power converter circuitry of claim 2 wherein the power converter output voltage is one of 1.5 times greater than the supply voltage and 2.0 times greater than the supply voltage.

4. The dual-output power converter circuitry of claim 1 wherein:

the plurality of switching elements comprises;

a first switching element coupled between the input node and a first intermediate node;

a second switching element coupled between the input node and a second intermediate node;

a third switching element coupled between the input node and a third intermediate node;

a fourth switching element coupled between the input node and a fourth intermediate node;

a fifth switching element coupled between the second intermediate node and the third intermediate node;

a sixth switching element coupled between the first intermediate node and the first output node;

a seventh switching element coupled between the first intermediate node and the second output node;

an eighth switching element coupled between the second intermediate node and ground;

a ninth switching element coupled between the third intermediate node and the second output node;

a tenth switching element coupled between the third intermediate node and the first output node; and

an eleventh switching element coupled between the fourth intermediate node and ground; and

the plurality of capacitive elements comprises;

a first capacitive element coupled between the first intermediate node and the second intermediate node; and

a second capacitive element coupled between the third intermediate node and the fourth intermediate node.

5. Envelope tracking power converter circuitry comprising:

a first envelope tracking power supply signal output node;

a second envelope tracking power supply signal output node;

dual-output power converter circuitry configured to asynchronously provide a first power converter output voltage and a second power converter output voltage based on a supply voltage;

a voltage regulator configured to provide a regulated supply voltage based on the supply voltage;

a first parallel amplifier configured to provide a first output voltage and a first output current based on a first parallel amplifier supply voltage, an envelope power converter control signal, and a first feedback signal from the first envelope tracking power supply signal output node;

a second parallel amplifier configured to provide a second output voltage and a second output current based on a second parallel amplifier supply voltage, an envelope power converter control signal, and a second feedback signal from the second envelope tracking power supply signal output node;

a first auxiliary switching power converter configured to;

in a first mode of operation, provide a portion of a first envelope tracking power supply signal to the first envelope tracking power supply signal output node based on the first power converter output voltage and a first auxiliary control signal, wherein the first auxiliary control signal is based on the first output current from the first parallel amplifier; and

in a second mode of operation, provide the second parallel amplifier supply voltage to the second parallel amplifier based on the first power converter output voltage; and

a second auxiliary switching power converter configured to;

in a first mode of operation, provide a portion of a second envelope tracking power supply signal to the second envelope tracking power supply signal output node based on the second power converter output voltage and a second auxiliary control signal, wherein the second auxiliary control signal is based on the second output current from the second parallel amplifier; and

in a second mode of operation, provide the first parallel amplifier supply voltage to the first parallel amplifier based on the second power converter output voltage.

6. The envelope tracking power converter circuitry of claim 5 wherein:

in the first mode of operation of the first auxiliary switching power converter, the second parallel amplifier supply voltage is the regulated supply voltage provided by the voltage regulator; and

in the first mode of operation of the second auxiliary switching power converter, the first parallel amplifier supply voltage is the regulated supply voltage provided by the voltage regulator.

7. The envelope tracking power converter circuitry of claim 6 wherein the voltage regulator is a low dropout regulator.

8. The envelope tracking power converter circuitry of claim 5 wherein the dual-output power converter circuitry comprises:

an input node;

a first output node;

a second output node;

a plurality of capacitive elements; and

a plurality of switching elements coupled between the input node, the first output node, the second output node, and the plurality of capacitive elements, wherein the dual-output power converter circuitry is configured to receive a supply voltage at the input node and selectively charge and discharge the plurality of capacitive elements from the supply voltage using the plurality of switching elements such that a power converter output voltage is asynchronously provided to the first output node and the second output node.

9. The envelope tracking power converter circuitry of claim 8 wherein:

the plurality of switching elements comprises;

a first switching element coupled between the input node and a first intermediate node;

a second switching element coupled between the input node and a second intermediate node;

a third switching element coupled between the input node and a third intermediate node;

a fourth switching element coupled between the input node and a fourth intermediate node;

a fifth switching element coupled between the second intermediate node and the third intermediate node;

a sixth switching element coupled between the first intermediate node and the first output node;

a seventh switching element coupled between the first intermediate node and the second output node;

an eighth switching element coupled between the second intermediate node and ground;

a ninth switching element coupled between the third intermediate node and the second output node;

a tenth switching element coupled between the third intermediate node and the first output node; and

an eleventh switching element coupled between the fourth intermediate node and ground; and

the plurality of capacitive elements comprises;

a first capacitive element coupled between the first intermediate node and the second intermediate node; and

a second capacitive element coupled between the third intermediate node and the fourth intermediate node.

10. The envelope tracking power converter circuitry of claim 5 wherein:

the first auxiliary switching power converter is further configured to, in a third mode of operation, provide a first average power tracking power supply signal to the first envelope tracking power supply signal output node based on the first power converter output voltage and the first auxiliary control signal, wherein the first auxiliary control signal is based on the first output current from the first parallel amplifier; and

the second auxiliary power converter is further configured to, in a third mode of operation, provide a second average power tracking power supply signal to the second envelope tracking power supply signal output node based on the second power converter output voltage and the second auxiliary control signal, wherein the second auxiliary control signal is based on the second output current form the second parallel amplifier.

11. The envelope tracking power converter circuitry of claim 10 wherein:

in the first mode of operation and the third mode of operation of the first auxiliary switching power converter, the first parallel amplifier is inactive; and

in the first mode of operation and the third mode of operation of the second auxiliary switching power converter, the second parallel amplifier is inactive.

12. The envelope tracking power converter circuitry of claim 11 wherein:

in the first mode of operation of the first auxiliary switching power converter, the second parallel amplifier supply voltage is the regulated supply voltage provided by the voltage regulator; and

in the first mode of operation of the second auxiliary switching power converter, the first parallel amplifier supply voltage is the regulated supply voltage provided by the voltage regulator.

13. The envelope tracking power converter circuitry of claim 11 wherein:

the dual-output power converter circuitry is a boost converter;

the first auxiliary switching power converter is a buck converter; and

the second auxiliary switching power converter is a buck converter.

14. A radio frequency (RF) transmitter section comprising:

a first set of power amplifiers configured to receive and amplify RF input signals within a first set of operating bands;

a second set of power amplifiers configured to receive and amplify RF input signals within a second set of operating bands;

envelope tracking power converter circuitry comprising;

a first envelope tracking power supply signal output node coupled to the first set of power amplifiers;

a second envelope tracking power supply signal output node coupled to the second set of power amplifiers;

dual-output power converter circuitry configured to asynchronously provide a first power converter output voltage and a second power converter output voltage based on a supply voltage;

a voltage regulator configured to provide a regulated supply voltage based on the supply voltage;

a first parallel amplifier configured to provide a first output voltage and a first output current based on a first parallel amplifier supply voltage, an envelope power converter control signal, and a first feedback signal from the first envelope tracking power supply signal output node;

a second parallel amplifier configured to provide a second output voltage and a second output current based on a second parallel amplifier supply voltage, an envelope power converter control signal, and a second feedback signal from the second envelope tracking power supply signal output node;

a first auxiliary switching power converter configured to;

in a first mode of operation, provide a portion of a first envelope tracking power supply signal to the first envelope tracking power supply signal output node based on the first power converter output voltage and a first auxiliary control signal, wherein the first auxiliary control signal is based on the first output current from the first parallel amplifier; and

in a second mode of operation, provide the second parallel amplifier supply voltage to the second parallel amplifier based on the first power converter output voltage; and

a second auxiliary switching power converter configured to;

in a first mode of operation, provide a portion of a second envelope tracking power supply signal to the second envelope tracking power supply signal output node based on the second power converter output voltage and a second auxiliary control signal, wherein the second auxiliary control signal is based on the second output current from the second parallel amplifier; and

in a second mode of operation, provide the first parallel amplifier supply voltage to the first parallel amplifier based on the second power converter output voltage.

15. The RF transmitter section of claim 14 wherein:

in the first mode of operation of the first auxiliary switching power converter, the second parallel amplifier supply voltage is the regulated supply voltage provided by the voltage regulator; and

in the first mode of operation of the second auxiliary switching power converter, the first parallel amplifier supply voltage is the regulated supply voltage provided by the voltage regulator.

16. The RF transmitter section of claim 14 wherein:

the first auxiliary switching power converter is further configured to, in a third mode of operation, provide a first average power tracking power supply signal to the first envelope tracking power supply signal output node based on the first power converter output voltage and the first auxiliary control signal, wherein the first auxiliary control signal is based on the first output current from the first parallel amplifier;

the second auxiliary power converter is further configured to, in a third mode of operation, provide a second average power tracking power supply signal to the second envelope tracking power supply signal output node based on the second power converter output voltage and the second auxiliary control signal, wherein the second auxiliary control signal is based on the second output current from the second parallel amplifier.

17. The RF transmitter section of claim 16 wherein:

in the first mode of operation and the third mode of operation of the first auxiliary switching power converter, the first parallel amplifier is inactive; and

in the first mode of operation and the third mode of operation of the second auxiliary switching power converter, the second parallel amplifier is inactive.

18. The RF transmitter section of claim 17 wherein:

in the first mode of operation of the first auxiliary switching power converter, the second parallel amplifier supply voltage is the regulated supply voltage provided by the voltage regulator; and

in the first mode of operation of the second auxiliary switching power converter, the first parallel amplifier supply voltage is the regulated supply voltage provided by the voltage regulator.

19. The RF transmitter section of claim 17 wherein the dual-output power converter circuitry comprises:

an input node;

a first output node;

a second output node;

a plurality of capacitive elements; and

a plurality of switching elements coupled between the input node, the first output node, the second output node, and the plurality of capacitive elements, wherein the dual-output power converter circuitry is configured to receive a supply voltage at the input node and selectively charge and discharge the plurality of capacitive elements from the supply voltage using the plurality of switching elements such that a power converter output voltage is asynchronously provided to the first output node and the second output node.

20. The RF transmitter section of claim 19 wherein:

the plurality of switching elements comprises;

a first switching element coupled between the input node and a first intermediate node;

a second switching element coupled between the input node and a second intermediate node;

a third switching element coupled between the input node and a third intermediate node;

a fourth switching element coupled between the input node and a fourth intermediate node;

a fifth switching element coupled between the second intermediate node and the third intermediate node;

a sixth switching element coupled between the first intermediate node and the first output node;

a seventh switching element coupled between the first intermediate node and the second output node;

an eighth switching element coupled between the second intermediate node and ground;

a ninth switching element coupled between the third intermediate node and the second output node;

a tenth switching element coupled between the third intermediate node and the first output node; and

an eleventh switching element coupled between the fourth intermediate node and ground; and

the plurality of capacitive elements comprises;

a first capacitive element coupled between the first intermediate node and the second intermediate node; and

a second capacitive element coupled between the third intermediate node and the fourth intermediate node.