SENSOR BUS INTERFACE FOR ELECTRONIC DEVICES

• US 20170103036A1
• Filed: 06/04/2015
• Published: 04/13/2017
• Est. Priority Date: 06/28/2014
• Status: Active Application

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Iyer, Sundar, Andiappan, Rajasekaran, Durg, Ajaya V., Foust, Kenneth P., Fleming, Bruce L.
• Granted Patent: US 10,282,344 B2
• Time in Patent Office: Days
• CPC Class Codes: G06F 1/3287 by switching off individual functional units in the computer system
• CPC Class Codes: G06F 13/26 with priority control
• CPC Class Codes: G06F 13/364 using independent requests or grants, e.g. using separated request and grant lines
• CPC Class Codes: G06F 13/404 with address mapping
• CPC Class Codes: G06F 13/4282 on a serial bus, e.g. I2C bus, SPI bus on daisy chain buses G06F13/4247
• CPC Class Codes: G06F 13/4295 using an embedded synchronisation
• CPC Class Codes: G06F 2213/0016 Inter-integrated circuit (I2C)

Abstract

In one example a sensor module comprises at least one sensor and a controller communicatively coupled to the at least one sensor by a communication bus, the controller comprising logic, at least partially including hardware logic, configured to generate a signal to configure the at least one sensor in a notify power state mode and place the signal on a communication bus coupled to the at least one sensor. Other examples may be described.

Claims

1. A controller comprising logic, at least partially including hardware logic, configured to:

generate a signal to configure at least one sensor in a notify power state mode; and

place the signal on a communication bus coupled to the at least one sensor.

2. The controller of claim 1, further comprising logic, at least partially including hardware logic, configured to:

generate a signal to configure an interrupt priority in the at least one sensor; and

place the signal on a communication bus coupled to the at least one sensor.

3. The controller of claim 2, further comprising logic, at least partially including hardware logic, configured to:

detect a change in an environmental condition; and

change the interrupt priority of the at least one sensor in response to the change in the environmental condition.

4. The controller of claim 1, further comprising logic, at least partially including hardware logic, configured to:

receive a power state notifier signal from the at least one sensor, wherein the power state notifier signal identifies a power state of the slave device; and

record the power state of the at least one sensor in a memory.

5. A sensor module, comprising:

at least one sensor; and

a controller communicatively coupled to the at least one sensor by a communication bus, the controller comprising logic, at least partially including hardware logic, configured to;

generate a signal to configure the at least one sensor in a notify power state mode; and

place the signal on a communication bus coupled to the at least one sensor.

6. The sensor module of claim 5, wherein the at least one sensor comprises logic, at least partially including hardware logic, configured to:

receive the signal from the controller; and

configure the at least one sensor into a notify power state.

7. The sensor module of claim 5, wherein the controller further comprises logic, at least partially including hardware logic, configured to:

generate a signal to configure an interrupt priority in the at least one sensor; and

place the signal on a communication bus coupled to the at least one sensor.

8. The sensor module of claim 7, wherein the at least one sensor comprises logic, at least partially including hardware logic, configured to:

receive the signal from the controller; and

configure an interrupt priority of at least one sensor.

9. The sensor module of claim 6, wherein the controller further comprises logic, at least partially including hardware logic, configured to:

detect a change in an environmental condition; and

change the interrupt priority of the at least one sensor in response to the change in the environmental condition.

10. The sensor module of claim 6, wherein the controller further comprises logic, at least partially including hardware logic, configured to:

receive a power state notifier signal from the slave device, wherein the power state notifier signal identifies a power state of the slave device; and

record the power state of the slave device in a memory.

11. An electronic device, comprising:

at least one processor; and

a sensor module, comprising;

at least one sensor; and

a controller communicatively coupled to the at least one sensor by a communication bus, the controller comprising logic, at least partially including hardware logic, configured to;

generate a signal to configure the at least one sensor in a notify power state mode; and

place the signal on a communication bus coupled to the at least one sensor.

12. The electronic device of claim 11, wherein the at least one sensor comprises logic, at least partially including hardware logic, configured to:

receive the signal from the controller; and

configure the at least one sensor into a notify power state.

13. The electronic device of claim 11, wherein the controller further comprises logic, at least partially including hardware logic, configured to:

generate a signal to configure an interrupt priority in the at least one sensor; and

place the signal on a communication bus coupled to the at least one sensor.

14. The electronic device of claim 13, wherein the at least one sensor comprises logic, at least partially including hardware logic, configured to:

receive the signal from the controller; and

configure an interrupt priority of at least one sensor.

15. The electronic device of claim 12, wherein the controller further comprises logic, at least partially including hardware logic, configured to:

detect a change in an environmental condition; and

change the interrupt priority of the at least one sensor in response to the change in the environmental condition.

16. The electronic device of claim 12, wherein the controller further comprises logic, at least partially including hardware logic, configured to:

receive a power state notifier signal from the slave device, wherein the power state notifier signal identifies a power state of the slave device; and

record the power state of the slave device in a memory.

17. A computer program product comprising logic instructions stored on a non-transitory computer readable medium which, when executed by a controller, configure the controller to:

generate a signal to configure a slave device in a notify power state mode; and

place the signal on a communication bus coupled to the slave device.

18. The computer program product of claim 17, further comprising logic, at least partially including hardware logic, configured to:

generate a signal to configure an interrupt priority in the slave device; and

place the signal on a communication bus coupled to the slave device.

19. The computer program product of claim 18, further comprising logic, at least partially including hardware logic, configured to:

detect a change in an environmental condition; and

change the interrupt priority of the slave device in response to the change in the environmental condition.

20. The computer program product of claim 19, further comprising logic, at least partially including hardware logic, configured to:

receive a power state notifier signal from the slave device, wherein the power state notifier signal identifies a power state of the slave device; and

record the power state of the slave device in a memory.