Method and System for Accelerated Stream Processing
First Claim
1. A stream processing method:
- streaming a plurality of data events through a member of the group consisting of (1) a reconfigurable logic device, (2) a graphics processor unit (GPU), and (3) a chip multi-processor (CMP), wherein the member includes a data processing pipeline, the pipeline including a plurality of parallel processing paths, the parallel processing paths including a first processing path and a second processing path in parallel with the first processing path;
within the first processing path, the member (1) filtering the streaming data events to generate a first reduced stream of the data events, and (2) performing at least one processing operation on the first reduced event stream to generate a first plurality of results for association with the first reduced event stream, wherein the member performs the filtering step and the at least one processing operation within the first processing path in a pipelined manner such that the member performs the at least one processing operation on the first reduced event stream within the first processing path while simultaneously performing the filtering step within the first processing path on new streaming events;
within the second processing path, the member (1) filtering the streaming data events to generate a second reduced stream of the data events, and (2) performing at least one processing operation on the second reduced event stream to generate a second plurality of results for association with the second reduced event stream, wherein the member performs the filtering step and the at least one processing operation within the second processing path in a pipelined manner such that the member performs the at least one processing operation on the second reduced event stream within the second processing path while simultaneously performing the filtering step within the second processing path on new streaming events; and
the member performing the steps within the first processing path in parallel with the steps within the second processing path.
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Accused Products
Abstract
Disclosed herein are methods and systems for hardware-accelerating various data processing operations in a rule-based decision-making system such as a business rules engine, an event stream processor, and a complex event stream processor. Preferably, incoming data streams are checked against a plurality of rule conditions. Among the data processing operations that are hardware-accelerated include rule condition check operations, filtering operations, and path merging operations. The rule condition check operations generate rule condition check results for the processed data streams, wherein the rule condition check results are indicative of any rule conditions which have been satisfied by the data streams. The generation of such results with a low degree of latency provides enterprises with the ability to perform timely decision-making based on the data present in received data streams.
11 Citations
72 Claims
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1. A stream processing method:
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streaming a plurality of data events through a member of the group consisting of (1) a reconfigurable logic device, (2) a graphics processor unit (GPU), and (3) a chip multi-processor (CMP), wherein the member includes a data processing pipeline, the pipeline including a plurality of parallel processing paths, the parallel processing paths including a first processing path and a second processing path in parallel with the first processing path; within the first processing path, the member (1) filtering the streaming data events to generate a first reduced stream of the data events, and (2) performing at least one processing operation on the first reduced event stream to generate a first plurality of results for association with the first reduced event stream, wherein the member performs the filtering step and the at least one processing operation within the first processing path in a pipelined manner such that the member performs the at least one processing operation on the first reduced event stream within the first processing path while simultaneously performing the filtering step within the first processing path on new streaming events; within the second processing path, the member (1) filtering the streaming data events to generate a second reduced stream of the data events, and (2) performing at least one processing operation on the second reduced event stream to generate a second plurality of results for association with the second reduced event stream, wherein the member performs the filtering step and the at least one processing operation within the second processing path in a pipelined manner such that the member performs the at least one processing operation on the second reduced event stream within the second processing path while simultaneously performing the filtering step within the second processing path on new streaming events; and the member performing the steps within the first processing path in parallel with the steps within the second processing path. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A method for processing a bit stream, the method comprising:
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receiving a bit stream at a coprocessor; and processing at least a portion of the bit stream against at least one rule condition to thereby generate a rule condition checking result for the bit stream portion, the rule condition checking result being indicative of a rule condition being satisfied, wherein the processing is performed by the coprocessor. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 36, 37, 38, 39, 40)
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34. The method of 11 wherein the processing step comprises:
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computing an aggregate value based at least in part upon the bit stream portion; determining whether a rule condition is satisfied based at least in part upon the computed aggregate value; and in response to a determination that that rule condition is satisfied, generating a rule condition check result indicative of that rule condition'"'"'s satisfaction. - View Dependent Claims (35)
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41. A method for processing a bit stream, the method comprising:
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receiving a bit stream at a reconfigurable logic device; and processing at least a portion of the bit stream against at least one rule condition to thereby generate a rule condition check result for the bit stream portion, the rule condition check result being indicative of a rule condition being satisfied, wherein the processing is performed by the reconfigurable logic device. - View Dependent Claims (42)
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43. A system for processing a bit stream, the system comprising:
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a processor; and a coprocessor in communication with the processor; wherein the coprocessor is configured to (1) accept a bit stream, and (2) process at least a portion of the bit stream against at least one rule condition to thereby generate a rule condition check result for the bit stream portion, the rule condition check result being indicative of a rule condition being satisfied. - View Dependent Claims (44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 68, 69, 70, 71, 72)
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66. The system of 43 wherein the coprocessor is further configured to:
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compute an aggregate value based at least in part upon the bit stream portion; determine whether a rule condition is satisfied based at least in part upon the computed aggregate value; and in response to a determination that that rule condition is satisfied, generate a rule condition check result indicative of that rule condition'"'"'s satisfaction. - View Dependent Claims (67)
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Specification