SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF

• US 20170178975A1
• Filed: 02/04/2016
• Published: 06/22/2017
• Est. Priority Date: 12/17/2015
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: CHANG, Che-Cheng, LIN, Chih-Han, TSENG, Horng-Huei
• Granted Patent: US 10,090,249 B2
• Time in Patent Office: Days
• CPC Class Codes: H01L 21/76831 in via holes or trenches, e.g. non-conductive sidewall liners
• CPC Class Codes: H01L 21/76897 Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step self-aligned silicidation on field effect transistors H01L29/665
• CPC Class Codes: H01L 21/823425 manufacturing common source or drain regions between a plurality of conductor-insulator-semiconductor structures
• CPC Class Codes: H01L 21/823475 interconnection or wiring or contact manufacturing related aspects
• CPC Class Codes: H01L 23/485 consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts H01L23/4821, H01L23/4822, H01L23/4824, H01L23/4825 take precedence; materials H01L23/532, bond pads H01L24/02, bump connectors H01L24/10
• CPC Class Codes: H01L 23/535 including internal interconnections, e.g. cross-under constructions internal lead connections H01L23/481
• CPC Class Codes: H01L 27/088 the components being field-effect transistors with insulated gate
• CPC Class Codes: H01L 29/0847 of field-effect transistors with insulated gate H01L29/0653 takes precedence; with a passive supplementary region between source or drain and substrate related to punch-through, capacity or isolation phenomena H01L29/1079; with LDD or DDD structure H01L29/7833; for thin film transistors H01L29/78618
• CPC Class Codes: H01L 29/7848 the means being located in the source/drain region, e.g. SiGe source and drain

Abstract

A semiconductor structure includes a substrate, a first gate structure, a first spacer, a source drain structure, a first dielectric layer, a conductor, and a protection layer. The first gate structure is present on the substrate. The first spacer is present on a sidewall of the first gate structure. The source drain structure is present adjacent to the first spacer. The first dielectric layer is present on the first gate structure and has an opening therein, in which the source drain structure is exposed through the opening. The conductor is electrically connected to the source drain structure, in which the conductor has an upper portion in the opening of the first dielectric layer and a lower portion between the upper portion and the source drain structure. The protection layer is present between the lower portion and the first spacer and between the upper portion and the source drain structure.

Claims

1. A semiconductor structure, comprising:

a substrate;

a first gate structure present on the substrate;

a first spacer present on at least one sidewall of the first gate structure;

a mask layer on the first gate structure, the mask layer comprising a dielectric material;

a source drain structure present adjacent to the first spacer;

a first dielectric layer present at least on the mask layer and having an opening therein, wherein the opening is over the source drain structure;

a conductor electrically connected to the source drain structure, wherein the conductor has an upper portion in the opening of the first dielectric layer and a lower portion between the upper portion and the source drain structure; and

a protection layer at least present between the lower portion of the conductor and the first spacer and between the upper portion of the conductor and the source drain structure.

2. The semiconductor structure of claim 1, wherein the protection layer is made of silicon nitride, silicon oxynitride, or combinations thereof.

3. The semiconductor structure of claim 1, further comprising:

a second gate structure present on the substrate; and

a second spacer present on at least one sidewall of the second gate structure, wherein the source drain structure is present between the first spacer and the second spacer.

4. The semiconductor structure of claim 3, wherein the protection layer is further present between the lower portion of the conductor and the second spacer.

5. The semiconductor structure of claim 1, further comprising:

a second dielectric layer at least present between the lower portion of the conductor and the first spacer and between the protection layer and the source drain structure.

6. The semiconductor structure of claim 5, wherein the protection layer and the second dielectric layer are made of different materials.

7. The semiconductor structure of claim 5, wherein the first dielectric layer and the second dielectric layer are made of substantially the same material.

8. The semiconductor structure of claim 1, wherein the protection layer is absent between the upper portion of the conductor and the first dielectric layer.

9. A semiconductor structure, comprising:

a substrate;

a gate structure present on the substrate;

a spacer present on at least one sidewall of the gate structure;

a source drain structure present adjacent to the spacer;

a bottom conductor electrically connected to the source drain structure;

a protection layer present between the bottom conductor and the spacer;

a first dielectric layer present at least on the gate structure and having an opening therein, wherein the bottom conductor is at least partially exposed through the opening, wherein sidewalls of the opening form a V-shape, wherein an upper portion of the spacer proximate the first dielectric layer has a first thickness that is smaller than a second thickness of a lower portion of the spacer proximate the source drain structure; and

an upper conductor electrically connected to the bottom conductor through the opening of the first dielectric layer and at least covering the protection layer.

10. The semiconductor structure of claim 9, wherein the protection layer is absent in the opening of the first dielectric layer.

11. The semiconductor structure of claim 9, further comprising:

a second dielectric layer present between the bottom conductor and the spacer, wherein the protection layer is present above the second dielectric layer.

12. The semiconductor structure of claim 11, wherein the protection layer and the second dielectric layer are made of different materials.

13. The semiconductor structure of claim 9, wherein the protection layer is made of silicon nitride, silicon oxynitride, or combinations thereof.

14-20. -20. (canceled)

21. A semiconductor structure, comprising:

a substrate;

a first gate structure present on the substrate;

a first spacer present on at least one sidewall of the first gate structure;

a second gate structure present on the substrate;

a second spacer present on at least one sidewall of the second gate structure;

a source drain structure present between the first spacer and the second spacer;

a bottom conductor electrically connected to the source drain structure;

a protection layer present between the bottom conductor and the first spacer and between the bottom conductor and the second spacer;

a first dielectric layer present at least on the first gate structure and the second gate structure and having an opening therein, wherein the bottom conductor is at least partially exposed through the opening, wherein the opening has a V-shaped cross-section, wherein the bottom conductor has a first width along a bottom surface and a second width along a top surface, wherein the first width is smaller than the second width;

a second dielectric layer between the first gate structure and the first dielectric layer, and between the second gate structure and the first dielectric layer;

a third dielectric layer between the bottom conductor and the first spacer, between the bottom conductor and the second spacer, and between the protection layer and the source drain structure, wherein a first thickness of the protection layer is larger than a second thickness of the third dielectric layer; and

an upper conductor electrically connected to the bottom conductor through the opening of the first dielectric layer.

22. The semiconductor structure of claim 21, wherein the protection layer is made of silicon nitride, silicon oxynitride, or combinations thereof.

24. The semiconductor structure of claim 21, wherein the protection layer and the third dielectric layer are made of different materials.

25. The semiconductor structure of claim 21, wherein the first dielectric layer and the third dielectric layer are made of substantially the same material.

26. The semiconductor structure of claim 21, wherein the protection layer is absent in the opening of the first dielectric layer.

27. The semiconductor structure of claim 21, wherein the first dielectric layer is made of silicon oxide, silicon nitride, silicon oxynitride, or combinations thereof.

28. The semiconductor structure of claim 21, wherein the first thickness of the protection layer is in a range from about 5 angstrom to about 200 angstrom, and the second thickness of the third dielectric layer is in a range from about 5 angstrom to about wo angstrom.

23. (canceled)