MEMORY SYSTEM AND OPERATING METHOD THEREOF

• US 20170315743A1
• Filed: 01/18/2017
• Published: 11/02/2017
• Est. Priority Date: 04/27/2016
• Status: Active Grant

• Current Assignee: SK Hynix Inc.
• Original Assignee: SK Hynix Inc.
• Inventors: KIM, Do-Hyun, SHIN, Soong-Sun, KIM, Dae-Hong
• Granted Patent: US 10,152,252 B2
• Time in Patent Office: Days
• CPC Class Codes: G06F 3/061 Improving I/O performance
• CPC Class Codes: G06F 3/0619 in relation to data integrity, e.g. data losses, bit errors
• CPC Class Codes: G06F 3/0626 Reducing size or complexity of storage systems
• CPC Class Codes: G06F 3/0635 by changing the path, e.g. traffic rerouting, path reconfiguration
• CPC Class Codes: G06F 3/064 Management of blocks
• CPC Class Codes: G06F 3/065 Replication mechanisms
• CPC Class Codes: G06F 3/0659 Command handling arrangements, e.g. command buffers, queues, command scheduling
• CPC Class Codes: G06F 3/068 Hybrid storage device
• CPC Class Codes: G06F 3/0688 Non-volatile semiconductor memory arrays

Abstract

A memory system includes a memory device including a first and a second group of memory blocks; and a controller suitable for: performing a processing operation corresponding to a plurality of workloads included in transactions received from a host, checking transaction identification information and completion information included in the workloads, storing first workloads among the workloads in the memory blocks included in the first group, corresponding to the identification information and the completion information, and transmitting and storing the first workloads into the memory blocks included in the second group.

Claims

1. A memory system, comprising:

a memory device including a first and a second group o memory blocks; and

a controller suitable for;

performing a processing operation corresponding to a plurality of workloads included in transactions received from a host,

checking transaction identification information and completion information included in the workloads,

storing first workloads among the workloads in the memory blocks included in the first group, corresponding to the identification information and the completion information, and

transmitting and storing the first workloads into the memory blocks included in the second group.

6. The memory system of claim 1, wherein the controller distributes and stores the first workloads into first memory blocks of the first group, which are coupled to each of multiple channels, and then transmits and stores the first workloads into second memory blocks of the second group, which are coupled to each of the same channels as the first memory blocks.

7. The memory system of claim 1, wherein the memory blocks of the first group include single-level cell memory blocks, and the memory blocks of the second group include triple-level cell memory blocks.

8. The memory system of claim 1, wherein the transactions are processed in units of transaction in the host, and the workloads of the transactions on which the processing operation is completed in the host and the workloads of the transactions in process are transmitted to the controller.

9. The memory system of claim 8, wherein the completion information is included in the last workload among the workloads of the transactions on which the processing operation is completed.

10. The memory system of claim 8, wherein the identification information is included in all the workloads of the transactions.

2. The memory system of claim wherein the first workloads are included in a first transaction on which the processing operation is completed in the host.

3. The memory system of claim 2, wherein each of the first workloads includes the identification information indicating the first transaction.

4. The memory system of claim 2, wherein the last workload among the first workloads includes the completion information indicating that the processing operation on the first transaction is completed in the host.

5. The memory system of claim wherein the controller stores the workloads in the memory blocks of the first group, and then transmits and stores the first workloads among the workloads stored in the memory blocks of the first group into the memory blocks of the second group.

11. A method for operating a memory system, comprising:

receiving transactions including workloads from a host for a plurality of memory blocks of a memory device, the plurality of memory blocks including a first group and a second group;

checking identification information and completion information on the transactions from the workloads;

storing first workloads among the workloads in the memory blocks included in the first group, corresponding to the identification information and the completion information; and

transmitting and storing the first workloads into the memory blocks included in the second group.

12. The method of claim 11, wherein tie first workloads are included in a first transaction on which a processing operation is completed in the host among the transactions.

13. The method of claim 12, wherein each of the first workloads includes the identification information indicating the first transaction.

14. The method of claim 12, wherein the last workload among the first workloads includes the completion information indicating that the processing operation on the first transaction is completed in the host.

15. The method of claim 11, wherein the workloads are stored in the memory blocks of the first group, and then the first workloads among the workloads stored in the memory blocks of the first group are transmitted and stored into the memory blocks of the second group.

16. The method of claim 11, wherein the first workloads are distributed and stored into first memory blocks of the first group, which are coupled to each of multiple channels, and then the first workloads are transmitted and stored into second memory blocks of the second group, which are coupled to each of the same channels as the first memory blocks.

17. The method of claim 11, wherein the memory blocks of the first group include single-level cell memory blocks, and the memory blocks of the second group include triple-level cell memory blocks.

18. The method of claim 11, wherein the transactions are processed in units of transaction in the host, and the workloads of the transactions on which the processing operation is completed in the host and the workloads of the transactions in process are transmitted to a controller of the memory device.

19. The method of claim 18, wherein the completion information is included in the last workload among the workloads of the transactions on which the processing operation is completed.

20. The method of claim 18, wherein the identification information is included in all the workloads of the transactions.