SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

• US 20170330974A1
• Filed: 08/01/2017
• Published: 11/16/2017
• Est. Priority Date: 12/04/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: YAMAZAKI, Shunpei
• Granted Patent: US 10,014,415 B2
• Time in Patent Office: Days
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 29/04 characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes characterised by physical imperfections H01L29/30
• CPC Class Codes: H01L 29/045 by their particular orientation of crystalline planes
• CPC Class Codes: H01L 29/24 including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22 including organic materials H10K99/00
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78648 arranged on opposing sides of the channel
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78693 the semiconducting oxide being amorphous
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

A semiconductor device includes an oxide semiconductor layer including a crystalline region over an insulating surface, a source electrode layer and a drain electrode layer in contact with the oxide semiconductor layer, a gate insulating layer covering the oxide semiconductor layer, the source electrode layer, and the drain electrode layer, and a gate electrode layer over the gate insulating layer in a region overlapping with the crystalline region. The crystalline region includes a crystal whose c-axis is aligned in a direction substantially perpendicular to a surface of the oxide semiconductor layer.

Claims

1. (canceled)

2. A semiconductor device comprising:

a first conductive layer;

a first insulating layer over the first conductive layer;

an oxide semiconductor layer including In, Ga, and Zn over the first insulating layer;

a second conductive layer electrically connected to the oxide semiconductor layer;

a third conductive layer electrically connected to the oxide semiconductor layer; and

a second insulating layer over each of the second conductive layer and the third conductive layer,

wherein the oxide semiconductor layer comprises a channel formation region,

wherein the oxide semiconductor layer comprises a first region and a second region below the first region,

wherein the first region comprises a crystal region containing a c-axis aligned crystal,

wherein the second region has lower crystallinity than the crystal region,

wherein the first region comprises a region in contact with the second insulating layer, and

wherein the second region comprises a region in contact with the first insulating layer.

3. The semiconductor device according to claim 2,

wherein the oxide semiconductor layer further includes a third region which is overlapped with the second conductive layer or the third conductive layer, and a fourth region which is not overlapped with the second conductive layer or the third conductive layer, and

wherein the fourth region is thinner than the third region.

4. The semiconductor device according to claim 2, wherein each of the second conductive layer and the third conductive layer includes a conductive metal oxide.

5. The semiconductor device according to claim 2, wherein the semiconductor device is one selected from the group consisting of a personal computer, a personal digital assistant, an electronic book, a cellular phone, a digital camera, and a television set.

6. The semiconductor device according to claim 2, wherein an impurity concentration in the oxide semiconductor layer is lower than or equal to 5×

10¹⁷cm<sup>−

3</sup>.

7. The semiconductor device according to claim 2, wherein a carrier concentration in the oxide semiconductor layer is lower than or equal to 1×

10¹²cm<sup>−

3</sup>.

8. A semiconductor device comprising:

a first conductive layer;

a first insulating layer over the first conductive layer;

an oxide semiconductor layer including In, Ga, and Zn over the first insulating layer;

a second conductive layer electrically connected to the oxide semiconductor layer;

a third conductive layer electrically connected to the oxide semiconductor layer; and

a second insulating layer over each of the second conductive layer and the third conductive layer,

wherein the oxide semiconductor layer comprises a channel formation region,

wherein the oxide semiconductor layer comprises a first region and a second region below the first region,

wherein the first region comprises a crystal region containing a c-axis aligned crystal,

wherein the second region has lower crystallinity than the crystal region,

wherein the first region comprises a region in contact with the second insulating layer,

wherein the second region comprises a region in contact with the first insulating layer, and

wherein the second conductive layer has a region in contact with the second region.

9. The semiconductor device according to claim 8,

wherein the oxide semiconductor layer further includes a third region which is overlapped with the second conductive layer or the third conductive layer, and a fourth region which is not overlapped with the second conductive layer or the third conductive layer, and

wherein the fourth region is thinner than the third region.

10. The semiconductor device according to claim 8, wherein each of the second conductive layer and the third conductive layer includes a conductive metal oxide.

11. The semiconductor device according to claim 8, wherein the semiconductor device is one selected from the group consisting of a personal computer, a personal digital assistant, an electronic book, a cellular phone, a digital camera, and a television set.

12. The semiconductor device according to claim 8, wherein an impurity concentration in the oxide semiconductor layer is lower than or equal to 5×

10¹⁷cm<sup>−

3</sup>.

13. The semiconductor device according to claim 8, wherein a carrier concentration in the oxide semiconductor layer is lower than or equal to 1×

10¹²cm<sup>−

3</sup>.